90fed1a09c
Previous code supported only "continuous" code without any kind of branch instructions. To change that, new function was implemented which parses current instruction and returns an addres where the jump might happen (alternative addr). mdthread structure was extended to support two breakpoints (one directly below current instruction and the second placed at the alternative location). One of them must trigger regardless the instruction has or has not been executed due to condition field. Upon cleanup, both software breakpoints are removed. This implementation parses only the most common instructions that are present in the code (like 99.99% of all), but there is a chance there are some left, not covered by the parsing routine. Parsing is done only for 32-bit instruction, no Thumb nor Thumb-2 support is provided. Reviewed by: kib Submitted by: Wojciech Macek <wma@semihalf.com> Obtained from: Semihalf Sponsored by: Juniper Networks Inc. Differential Revision: https://reviews.freebsd.org/D4021
99 lines
2.9 KiB
C
99 lines
2.9 KiB
C
/*-
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* Mach Operating System
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* Copyright (c) 1991,1990 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*
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* from: FreeBSD: src/sys/i386/include/db_machdep.h,v 1.16 1999/10/04
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* $FreeBSD$
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*/
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#ifndef _MACHINE_DB_MACHDEP_H_
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#define _MACHINE_DB_MACHDEP_H_
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#include <machine/frame.h>
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#include <machine/trap.h>
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#include <machine/armreg.h>
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#define T_BREAKPOINT (1)
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typedef vm_offset_t db_addr_t;
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typedef int db_expr_t;
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#define PC_REGS() ((db_addr_t)kdb_thrctx->pcb_regs.sf_pc)
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#define BKPT_INST (KERNEL_BREAKPOINT)
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#define BKPT_SIZE (INSN_SIZE)
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#define BKPT_SET(inst) (BKPT_INST)
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#define BKPT_SKIP do { \
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kdb_frame->tf_pc += BKPT_SIZE; \
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} while (0)
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#define SOFTWARE_SSTEP 1
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#define IS_BREAKPOINT_TRAP(type, code) (type == T_BREAKPOINT)
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#define IS_WATCHPOINT_TRAP(type, code) (0)
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#define inst_trap_return(ins) (0)
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/* ldmxx reg, {..., pc}
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01800000 stack mode
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000f0000 register
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0000ffff register list */
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/* mov pc, reg
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0000000f register */
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#define inst_return(ins) (((ins) & 0x0e108000) == 0x08108000 || \
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((ins) & 0x0ff0fff0) == 0x01a0f000 || \
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((ins) & 0x0ffffff0) == 0x012fff10) /* bx */
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/* bl ...
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00ffffff offset>>2 */
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#define inst_call(ins) (((ins) & 0x0f000000) == 0x0b000000)
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/* b ...
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00ffffff offset>>2 */
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/* ldr pc, [pc, reg, lsl #2]
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0000000f register */
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#define inst_branch(ins) (((ins) & 0x0f000000) == 0x0a000000 || \
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((ins) & 0x0fdffff0) == 0x079ff100 || \
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((ins) & 0x0cd0f000) == 0x0490f000 || \
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((ins) & 0x0ffffff0) == 0x012fff30 || /* blx */ \
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((ins) & 0x0de0f000) == 0x0080f000)
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#define inst_load(ins) (0)
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#define inst_store(ins) (0)
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#define next_instr_address(pc, bd) ((bd) ? (pc) : ((pc) + INSN_SIZE))
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#define DB_SMALL_VALUE_MAX (0x7fffffff)
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#define DB_SMALL_VALUE_MIN (-0x40001)
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#define DB_ELFSIZE 32
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int db_validate_address(vm_offset_t);
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u_int branch_taken (u_int insn, db_addr_t pc);
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#ifdef __ARMEB__
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#define BYTE_MSF (1)
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#endif
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#endif /* !_MACHINE_DB_MACHDEP_H_ */
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