John Baldwin 5ae84c09e7 Really slam the door on mixed mode now that we don't depend on it for a ... working IRQ0 with APIC anymore. Previously, it was possible to have some other ATPIC IRQS "leak" through in a few edge cases. For example, on my x86 test machine, ACPI re-routes the SCI (IRQ 9) to intpin 13 on the first I/O APIC. This leaves a hole for IRQ 13 (since the APIC doesn't provide a source for IRQ 13 in that case) with the result that the ATPIC IRQ13 source was registered instead. This changes the 8259A drivers to only register their interrupt sources if none of the 16 ISA IRQs have an interrupt source already installed. MFC after: 1 week		2005-12-05 22:09:30 +00:00
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acpica	Catch up with ACPI-CA 20051021 import	2005-11-01 22:44:08 +00:00
amd64	If we get a stray interrupt, return after logging it. In the extremely	2005-11-28 20:18:43 +00:00
compile	Make space for compilations.	2002-07-06 02:49:07 +00:00
conf	Merge DRM CVS as of 2005-12-02, adding i915 DRM support thanks to Alexey Popov,	2005-12-03 01:23:50 +00:00
ia32	Catch up with the recent <sys/signal.h> change and make this compile.	2005-11-04 20:32:26 +00:00
include	Change the x86 code to allocate IDT vectors on-demand when an interrupt	2005-11-02 20:11:47 +00:00
isa	Really slam the door on mixed mode now that we don't depend on it for a	2005-12-05 22:09:30 +00:00
linux32	Calling setrlimit from 32bit apps could potentially increase certain	2005-11-02 21:18:07 +00:00
pci	Modify the pci_cfgdisable() routine to bring it more in line with	2005-10-25 04:53:29 +00:00
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