freebsd-skq/sys/contrib/octeon-sdk/cvmx-coremask.c
Juli Mallett dc4ee6ca91 Merge the Cavium Octeon SDK 2.3.0 Simple Executive code and update FreeBSD to
make use of it where possible.

This primarily brings in support for newer hardware, and FreeBSD is not yet
able to support the abundance of IRQs on new hardware and many features in the
Ethernet driver.

Because of the changes to IRQs in the Simple Executive, we have to maintain our
own list of Octeon IRQs now, which probably can be pared-down and be specific
to the CIU interrupt unit soon, and when other interrupt mechanisms are added
they can maintain their own definitions.

Remove unmasking of interrupts from within the UART device now that the
function used is no longer present in the Simple Executive.  The unmasking
seems to have been gratuitous as this is more properly handled by the buses
above the UART device, and seems to work on that basis.
2012-03-11 06:17:49 +00:00

135 lines
4.1 KiB
C

/***********************license start***************
* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
* reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of Cavium Inc. nor the names of
* its contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
* This Software, including technical data, may be subject to U.S. export control
* laws, including the U.S. Export Administration Act and its associated
* regulations, and may be subject to export or import regulations in other
* countries.
* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
***********************license end**************************************/
/**
* @file
*
* Module to support operations on bitmap of cores. Coremask can be used to
* select a specific core, a group of cores, or all available cores, for
* initialization and differentiation of roles within a single shared binary
* executable image.
*
* <hr>$Revision: 70030 $<hr>
*
*/
#include "cvmx-config.h"
#include "cvmx.h"
#include "cvmx-spinlock.h"
#include "cvmx-coremask.h"
#define CVMX_COREMASK_MAX_SYNCS 20 /* maximum number of coremasks for barrier sync */
/**
* This structure defines the private state maintained by coremask module.
*
*/
CVMX_SHARED static struct {
cvmx_spinlock_t lock; /**< mutex spinlock */
struct {
unsigned int coremask; /**< coremask specified for barrier */
unsigned int checkin; /**< bitmask of cores checking in */
volatile unsigned int exit; /**< variable to poll for exit condition */
} s[CVMX_COREMASK_MAX_SYNCS];
} state = {
{ CVMX_SPINLOCK_UNLOCKED_VAL },
{ { 0, 0, 0 } },
};
/**
* Wait (stall) until all cores in the given coremask has reached this point
* in the program execution before proceeding.
*
* @param coremask the group of cores performing the barrier sync
*
*/
void cvmx_coremask_barrier_sync(unsigned int coremask)
{
int i;
unsigned int target;
assert(coremask != 0);
cvmx_spinlock_lock(&state.lock);
for (i = 0; i < CVMX_COREMASK_MAX_SYNCS; i++) {
if (state.s[i].coremask == 0) {
/* end of existing coremask list, create new entry, fall-thru */
state.s[i].coremask = coremask;
}
if (state.s[i].coremask == coremask) {
target = state.s[i].exit + 1; /* wrap-around at 32b */
state.s[i].checkin |= cvmx_coremask_core(cvmx_get_core_num());
if (state.s[i].checkin == coremask) {
state.s[i].checkin = 0;
state.s[i].exit = target; /* signal exit condition */
}
cvmx_spinlock_unlock(&state.lock);
while (state.s[i].exit != target)
;
return;
}
}
/* error condition - coremask array overflowed */
cvmx_spinlock_unlock(&state.lock);
assert(0);
}