marius 109d6f3c87 Add a MD __PCI_BAR_ZERO_VALID which denotes that BARs containing 0 ... actually specify valid bases that should be treated just as normal. The PCI specifications have no indication that 0 would be a magic value indicating a disabled BAR as commonly used on at least amd64 and i386 but not sparc64. It's unclear what to do in pci_delete_resource() instead of writing 0 to a BAR though as there's no (other) way do disable individual BARs so its decoding is left enabled in case of __PCI_BAR_ZERO_VALID for now. Approved by: re (kib), jhb MFC after: 1 week		2009-07-21 19:06:39 +00:00
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eisa_pci.c
fixup_pci.c
hostb_pci.c
ignore_pci.c
isa_pci.c
pci_if.m	Revamp the MSI/MSI-X code a bit to achieve two main goals:	2007-05-02 17:50:36 +00:00
pci_pci.c	Revert junk from last commit. These are WIP and not ready (and don't	2009-05-20 22:00:39 +00:00
pci_private.h	Further refine the handling of resources for BARs in the PCI bus driver.	2009-03-03 16:38:59 +00:00
pci_user.c	- Add a new ioctl to /dev/pci to fetch details on an individual BAR of a	2009-02-02 19:54:16 +00:00
pci.c	Add a MD __PCI_BAR_ZERO_VALID which denotes that BARs containing 0	2009-07-21 19:06:39 +00:00
pcib_if.m	Revert junk from last commit. These are WIP and not ready (and don't	2009-05-20 22:00:39 +00:00
pcib_private.h	Two fixes:	2009-03-14 14:08:53 +00:00
pcireg.h	- Add a few more register defintions for the PCI express capability	2009-04-17 19:07:44 +00:00
pcivar.h	Adjust some comments.	2009-06-01 20:27:14 +00:00
vga_pci.c	The recent PCI resource allocation fixes exposed a bug where the same	2009-03-04 21:04:52 +00:00