729 lines
21 KiB
C
729 lines
21 KiB
C
/*******************************************************************************
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Copyright (c) 2001-2007, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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/* $FreeBSD$ */
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#include "ixgbe_type.h"
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#include "ixgbe_api.h"
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#include "ixgbe_common.h"
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#include "ixgbe_phy.h"
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#define IXGBE_82598_MAX_TX_QUEUES 32
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#define IXGBE_82598_MAX_RX_QUEUES 64
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#define IXGBE_82598_RAR_ENTRIES 16
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s32 ixgbe_init_shared_code_82598(struct ixgbe_hw *hw);
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s32 ixgbe_assign_func_pointers_82598(struct ixgbe_hw *hw);
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s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg);
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s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg);
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enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
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u32 ixgbe_get_num_of_tx_queues_82598(struct ixgbe_hw *hw);
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u32 ixgbe_get_num_of_rx_queues_82598(struct ixgbe_hw *hw);
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s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
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s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *link_up);
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s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg,
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bool autoneg_wait_to_complete);
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s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
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s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *link_up);
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s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg,
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bool autoneg_wait_to_complete);
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#ifndef NO_82598_A0_SUPPORT
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s32 ixgbe_reset_hw_rev_0_82598(struct ixgbe_hw *hw);
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#endif
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s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
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u32 ixgbe_get_num_rx_addrs_82598(struct ixgbe_hw *hw);
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/**
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* ixgbe_init_shared_code_82598 - Inits func ptrs and MAC type
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* @hw: pointer to hardware structure
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*
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* Initialize the shared code for 82598. This will assign function pointers
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* and assign the MAC type. Does not touch the hardware.
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**/
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s32 ixgbe_init_shared_code_82598(struct ixgbe_hw *hw)
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{
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/* Set MAC type */
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hw->mac.type = ixgbe_mac_82598EB;
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/* Assign function pointers */
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ixgbe_assign_func_pointers_82598(hw);
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_assign_func_pointers_82598 - Assigns 82598-specific funtion pointers
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* @hw: pointer to hardware structure
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*
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* Note - Generic function pointers have already been assigned, so the
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* function pointers set here are only for 82598-specific functions.
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**/
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s32 ixgbe_assign_func_pointers_82598(struct ixgbe_hw *hw)
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{
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hw->func.ixgbe_func_get_media_type =
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&ixgbe_get_media_type_82598;
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hw->func.ixgbe_func_get_num_of_tx_queues =
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&ixgbe_get_num_of_tx_queues_82598;
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hw->func.ixgbe_func_get_num_of_rx_queues =
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&ixgbe_get_num_of_rx_queues_82598;
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#ifndef NO_82598_A0_SUPPORT
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if (hw->revision_id == 0) {
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hw->func.ixgbe_func_reset_hw =
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&ixgbe_reset_hw_rev_0_82598;
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} else {
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hw->func.ixgbe_func_reset_hw = &ixgbe_reset_hw_82598;
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}
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#else
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hw->func.ixgbe_func_reset_hw = &ixgbe_reset_hw_82598;
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#endif
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hw->func.ixgbe_func_get_num_rx_addrs =
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&ixgbe_get_num_rx_addrs_82598;
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/* Link */
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if (ixgbe_get_media_type(hw) == ixgbe_media_type_copper) {
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hw->func.ixgbe_func_setup_link =
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&ixgbe_setup_copper_link_82598;
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hw->func.ixgbe_func_check_link =
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&ixgbe_check_copper_link_82598;
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hw->func.ixgbe_func_setup_link_speed =
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&ixgbe_setup_copper_link_speed_82598;
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hw->func.ixgbe_func_get_link_settings =
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&ixgbe_get_copper_link_settings_82598;
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} else {
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hw->func.ixgbe_func_setup_link =
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&ixgbe_setup_mac_link_82598;
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hw->func.ixgbe_func_check_link =
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&ixgbe_check_mac_link_82598;
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hw->func.ixgbe_func_setup_link_speed =
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&ixgbe_setup_mac_link_speed_82598;
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hw->func.ixgbe_func_get_link_settings =
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&ixgbe_get_link_settings_82598;
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}
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_get_link_settings_82598 - Determines default link settings
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the default link settings by reading the AUTOC register.
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**/
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s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
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bool *autoneg)
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{
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s32 status = IXGBE_SUCCESS;
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s32 autoc_reg;
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autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
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if (hw->mac.link_settings_loaded) {
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autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
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autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
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autoc_reg |= hw->mac.link_attach_type;
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autoc_reg |= hw->mac.link_mode_select;
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}
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switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
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case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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*autoneg = FALSE;
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break;
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case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
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*speed = IXGBE_LINK_SPEED_10GB_FULL;
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*autoneg = FALSE;
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break;
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case IXGBE_AUTOC_LMS_1G_AN:
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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*autoneg = TRUE;
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break;
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case IXGBE_AUTOC_LMS_KX4_AN:
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case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
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*speed = IXGBE_LINK_SPEED_UNKNOWN;
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if (autoc_reg & IXGBE_AUTOC_KX4_SUPP) {
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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}
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if (autoc_reg & IXGBE_AUTOC_KX_SUPP) {
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*speed |= IXGBE_LINK_SPEED_1GB_FULL;
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}
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*autoneg = TRUE;
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break;
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default:
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status = IXGBE_ERR_LINK_SETUP;
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break;
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}
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return status;
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}
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/**
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* ixgbe_get_copper_link_settings_82598 - Determines default link settings
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the default link settings by reading the AUTOC register.
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**/
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s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg)
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{
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s32 status = IXGBE_ERR_LINK_SETUP;
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u16 speed_ability;
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*speed = 0;
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*autoneg = TRUE;
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status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
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IXGBE_MDIO_PMA_PMD_DEV_TYPE,
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&speed_ability);
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if (status == IXGBE_SUCCESS) {
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if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G)
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*speed |= IXGBE_LINK_SPEED_1GB_FULL;
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}
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return status;
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}
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/**
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* ixgbe_get_media_type_82598 - Determines media type
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* @hw: pointer to hardware structure
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*
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* Returns the media type (fiber, copper, backplane)
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**/
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enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
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{
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enum ixgbe_media_type media_type;
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/* Media type for I82598 is based on device ID */
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switch (hw->device_id) {
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case IXGBE_DEV_ID_82598:
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/* Default device ID is mezzanine card KX/KX4 */
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media_type = ixgbe_media_type_backplane;
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break;
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case IXGBE_DEV_ID_82598_FPGA:
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case IXGBE_DEV_ID_82598AF_DUAL_PORT:
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case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
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media_type = ixgbe_media_type_fiber;
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break;
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case IXGBE_DEV_ID_82598AT_DUAL_PORT:
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media_type = ixgbe_media_type_copper;
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break;
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default:
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media_type = ixgbe_media_type_unknown;
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break;
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}
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return media_type;
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}
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/**
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* ixgbe_get_num_of_tx_queues_82598 - Get number of TX queues
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* @hw: pointer to hardware structure
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*
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* Returns the number of transmit queues for the given adapter.
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**/
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u32 ixgbe_get_num_of_tx_queues_82598(struct ixgbe_hw *hw)
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{
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if (hw->device_id == IXGBE_DEV_ID_82598_FPGA)
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return 8;
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return IXGBE_82598_MAX_TX_QUEUES;
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}
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/**
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* ixgbe_get_num_of_rx_queues_82598 - Get number of RX queues
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* @hw: pointer to hardware structure
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*
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* Returns the number of receive queues for the given adapter.
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**/
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u32 ixgbe_get_num_of_rx_queues_82598(struct ixgbe_hw *hw)
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{
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if (hw->device_id == IXGBE_DEV_ID_82598_FPGA)
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return 8;
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return IXGBE_82598_MAX_RX_QUEUES;
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}
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/**
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* ixgbe_setup_mac_link_82598 - Configures MAC link settings
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* @hw: pointer to hardware structure
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*
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* Configures link settings based on values in the ixgbe_hw struct.
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* Restarts the link. Performs autonegotiation if needed.
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**/
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s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
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{
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u32 autoc_reg;
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u32 links_reg;
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u32 i;
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s32 status = IXGBE_SUCCESS;
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autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
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if (hw->mac.link_settings_loaded) {
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autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
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autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
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autoc_reg |= hw->mac.link_attach_type;
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autoc_reg |= hw->mac.link_mode_select;
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IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
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msec_delay(50);
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}
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/* Restart link */
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autoc_reg |= IXGBE_AUTOC_AN_RESTART;
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IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
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/* Only poll for autoneg to complete if specified to do so */
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if (hw->phy.autoneg_wait_to_complete) {
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if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN ||
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hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
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links_reg = 0; /* Just in case Autoneg time = 0 */
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for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
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links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
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if (links_reg & IXGBE_LINKS_KX_AN_COMP)
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break;
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msec_delay(100);
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}
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if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
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status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
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DEBUGOUT("Autonegotiation did not complete.\n");
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}
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}
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}
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/* Add delay to filter out noises during initial link setup */
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msec_delay(50);
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return status;
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}
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/**
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* ixgbe_check_mac_link_82598 - Get link/speed status
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @link_up: TRUE is link is up, FALSE otherwise
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*
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* Reads the links register to determine if link is up and the current speed
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**/
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s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
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bool *link_up)
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{
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u32 links_reg;
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links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
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if (links_reg & IXGBE_LINKS_UP)
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*link_up = TRUE;
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else
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*link_up = FALSE;
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if (links_reg & IXGBE_LINKS_SPEED)
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*speed = IXGBE_LINK_SPEED_10GB_FULL;
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else
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
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* @hw: pointer to hardware structure
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* @speed: new link speed
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* @autoneg: TRUE if auto-negotiation enabled
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* @autoneg_wait_to_complete: TRUE if waiting is needed to complete
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*
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* Set the link speed in the AUTOC register and restarts link.
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**/
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s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed speed, bool autoneg,
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bool autoneg_wait_to_complete)
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{
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s32 status = IXGBE_SUCCESS;
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/* If speed is 10G, then check for CX4 or XAUI. */
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if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
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(!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4)))
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
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else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg))
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
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else if (autoneg) {
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/* BX mode - Autonegotiate 1G */
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if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD))
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN;
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else /* KX/KX4 mode */
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN;
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} else {
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status = IXGBE_ERR_LINK_SETUP;
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}
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if (status == IXGBE_SUCCESS) {
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hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete;
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hw->mac.link_settings_loaded = TRUE;
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/*
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* Setup and restart the link based on the new values in
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* ixgbe_hw This will write the AUTOC register based on the new
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* stored values
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*/
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ixgbe_setup_mac_link_82598(hw);
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}
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return status;
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}
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/**
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* ixgbe_setup_copper_link_82598 - Setup copper link settings
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* @hw: pointer to hardware structure
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*
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* Configures link settings based on values in the ixgbe_hw struct.
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* Restarts the link. Performs autonegotiation if needed. Restart
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* phy and wait for autonegotiate to finish. Then synchronize the
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* MAC and PHY.
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**/
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s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
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{
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s32 status;
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ixgbe_link_speed speed = 0;
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bool link_up = FALSE;
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/* Set up MAC */
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ixgbe_setup_mac_link_82598(hw);
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/* Restart autonegotiation on PHY */
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status = ixgbe_setup_phy_link(hw);
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/* Synchronize MAC to PHY speed */
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if (status == IXGBE_SUCCESS)
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status = ixgbe_check_link(hw, &speed, &link_up);
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return status;
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}
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/**
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* ixgbe_check_copper_link_82598 - Syncs MAC & PHY link settings
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* @hw: pointer to hardware structure
|
|
* @speed: pointer to link speed
|
|
* @link_up: TRUE if link is up, FALSE otherwise
|
|
*
|
|
* Reads the mac link, phy link, and synchronizes the MAC to PHY.
|
|
**/
|
|
s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
|
bool *link_up)
|
|
{
|
|
s32 status;
|
|
ixgbe_link_speed phy_speed = 0;
|
|
bool phy_link = FALSE;
|
|
|
|
/* This is the speed and link the MAC is set at */
|
|
ixgbe_check_mac_link_82598(hw, speed, link_up);
|
|
|
|
/*
|
|
* Check current speed and link status of the PHY register.
|
|
* This is a vendor specific register and may have to
|
|
* be changed for other copper PHYs.
|
|
*/
|
|
status = ixgbe_check_phy_link(hw, &phy_speed, &phy_link);
|
|
|
|
if ((status == IXGBE_SUCCESS) && (phy_link)) {
|
|
/*
|
|
* Check current link status of the MACs link's register
|
|
* matches that of the speed in the PHY register
|
|
*/
|
|
if (*speed != phy_speed) {
|
|
/*
|
|
* The copper PHY requires 82598 attach type to be XAUI
|
|
* for 10G and BX for 1G
|
|
*/
|
|
hw->mac.link_attach_type =
|
|
(IXGBE_AUTOC_10G_XAUI | IXGBE_AUTOC_1G_BX);
|
|
|
|
/* Synchronize the MAC speed to the PHY speed */
|
|
status = ixgbe_setup_mac_link_speed_82598(hw, phy_speed,
|
|
FALSE, FALSE);
|
|
if (status == IXGBE_SUCCESS)
|
|
ixgbe_check_mac_link_82598(hw, speed, link_up);
|
|
else
|
|
status = IXGBE_ERR_LINK_SETUP;
|
|
}
|
|
} else {
|
|
*link_up = phy_link;
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
|
|
* @hw: pointer to hardware structure
|
|
* @speed: new link speed
|
|
* @autoneg: TRUE if autonegotiation enabled
|
|
* @autoneg_wait_to_complete: TRUE if waiting is needed to complete
|
|
*
|
|
* Sets the link speed in the AUTOC register in the MAC and restarts link.
|
|
**/
|
|
s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw,
|
|
ixgbe_link_speed speed,
|
|
bool autoneg,
|
|
bool autoneg_wait_to_complete)
|
|
{
|
|
s32 status;
|
|
bool link_up = 0;
|
|
|
|
/* Setup the PHY according to input speed */
|
|
status = ixgbe_setup_phy_link_speed(hw, speed, autoneg,
|
|
autoneg_wait_to_complete);
|
|
|
|
/* Synchronize MAC to PHY speed */
|
|
if (status == IXGBE_SUCCESS)
|
|
status = ixgbe_check_link(hw, &speed, &link_up);
|
|
|
|
return status;
|
|
}
|
|
|
|
#ifndef NO_82598_A0_SUPPORT
|
|
/**
|
|
* ixgbe_reset_hw_rev_0_82598 - Performs hardware reset
|
|
* @hw: pointer to hardware structure
|
|
*
|
|
* Resets the hardware by reseting the transmit and receive units, masks and
|
|
* clears all interrupts, performing a PHY reset, and performing a link (MAC)
|
|
* reset.
|
|
**/
|
|
s32 ixgbe_reset_hw_rev_0_82598(struct ixgbe_hw *hw)
|
|
{
|
|
s32 status = IXGBE_SUCCESS;
|
|
u32 ctrl;
|
|
u32 gheccr;
|
|
u32 autoc;
|
|
u32 i;
|
|
u32 resets;
|
|
|
|
/* Call adapter stop to disable tx/rx and clear interrupts */
|
|
ixgbe_stop_adapter(hw);
|
|
|
|
/* Reset PHY */
|
|
ixgbe_reset_phy(hw);
|
|
|
|
for (resets = 0; resets < 10; resets++) {
|
|
/*
|
|
* Prevent the PCI-E bus from from hanging by disabling PCI-E
|
|
* master access and verify no pending requests before reset
|
|
*/
|
|
if (ixgbe_disable_pcie_master(hw) != IXGBE_SUCCESS) {
|
|
status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
|
|
DEBUGOUT("PCI-E Master disable polling has failed.\n");
|
|
}
|
|
|
|
/*
|
|
* Issue global reset to the MAC. This needs to be a SW reset.
|
|
* If link reset is used, it might reset the MAC when mng is
|
|
* using it.
|
|
*/
|
|
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
|
|
IXGBE_WRITE_FLUSH(hw);
|
|
|
|
/*
|
|
* Poll for reset bit to self-clear indicating reset is
|
|
* complete
|
|
*/
|
|
for (i = 0; i < 10; i++) {
|
|
usec_delay(1);
|
|
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
if (!(ctrl & IXGBE_CTRL_RST))
|
|
break;
|
|
}
|
|
if (ctrl & IXGBE_CTRL_RST) {
|
|
status = IXGBE_ERR_RESET_FAILED;
|
|
DEBUGOUT("Reset polling failed to complete.\n");
|
|
}
|
|
}
|
|
|
|
msec_delay(50);
|
|
|
|
gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
|
|
gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
|
|
IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
|
|
|
|
/*
|
|
* AUTOC register which stores link settings gets cleared
|
|
* and reloaded from EEPROM after reset. We need to restore
|
|
* our stored value from init in case SW changed the attach
|
|
* type or speed. If this is the first time and link settings
|
|
* have not been stored, store default settings from AUTOC.
|
|
*/
|
|
autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
|
if (hw->mac.link_settings_loaded) {
|
|
autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
|
|
autoc &= ~(IXGBE_AUTOC_LMS_MASK);
|
|
autoc |= hw->mac.link_attach_type;
|
|
autoc |= hw->mac.link_mode_select;
|
|
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
|
|
} else {
|
|
hw->mac.link_attach_type =
|
|
(autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
|
|
hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
|
|
hw->mac.link_settings_loaded = TRUE;
|
|
}
|
|
|
|
/* Store the permanent mac address */
|
|
ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
|
|
|
|
return status;
|
|
}
|
|
|
|
#endif /* NO_A0_SUPPORT */
|
|
/**
|
|
* ixgbe_reset_hw_82598 - Performs hardware reset
|
|
* @hw: pointer to hardware structure
|
|
*
|
|
* Resets the hardware by reseting the transmit and receive units, masks and
|
|
* clears all interrupts, performing a PHY reset, and performing a link (MAC)
|
|
* reset.
|
|
**/
|
|
s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
|
|
{
|
|
s32 status = IXGBE_SUCCESS;
|
|
u32 ctrl;
|
|
u32 gheccr;
|
|
u32 i;
|
|
u32 autoc;
|
|
|
|
/* Call adapter stop to disable tx/rx and clear interrupts */
|
|
ixgbe_stop_adapter(hw);
|
|
|
|
/* Reset PHY */
|
|
ixgbe_reset_phy(hw);
|
|
|
|
/*
|
|
* Prevent the PCI-E bus from from hanging by disabling PCI-E master
|
|
* access and verify no pending requests before reset
|
|
*/
|
|
if (ixgbe_disable_pcie_master(hw) != IXGBE_SUCCESS) {
|
|
status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
|
|
DEBUGOUT("PCI-E Master disable polling has failed.\n");
|
|
}
|
|
|
|
/*
|
|
* Issue global reset to the MAC. This needs to be a SW reset.
|
|
* If link reset is used, it might reset the MAC when mng is using it
|
|
*/
|
|
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
|
|
IXGBE_WRITE_FLUSH(hw);
|
|
|
|
/* Poll for reset bit to self-clear indicating reset is complete */
|
|
for (i = 0; i < 10; i++) {
|
|
usec_delay(1);
|
|
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
if (!(ctrl & IXGBE_CTRL_RST))
|
|
break;
|
|
}
|
|
if (ctrl & IXGBE_CTRL_RST) {
|
|
status = IXGBE_ERR_RESET_FAILED;
|
|
DEBUGOUT("Reset polling failed to complete.\n");
|
|
}
|
|
|
|
msec_delay(50);
|
|
|
|
gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
|
|
gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
|
|
IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
|
|
|
|
/*
|
|
* AUTOC register which stores link settings gets cleared
|
|
* and reloaded from EEPROM after reset. We need to restore
|
|
* our stored value from init in case SW changed the attach
|
|
* type or speed. If this is the first time and link settings
|
|
* have not been stored, store default settings from AUTOC.
|
|
*/
|
|
autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
|
if (hw->mac.link_settings_loaded) {
|
|
autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
|
|
autoc &= ~(IXGBE_AUTOC_LMS_MASK);
|
|
autoc |= hw->mac.link_attach_type;
|
|
autoc |= hw->mac.link_mode_select;
|
|
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
|
|
} else {
|
|
hw->mac.link_attach_type =
|
|
(autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
|
|
hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
|
|
hw->mac.link_settings_loaded = TRUE;
|
|
}
|
|
|
|
/* Store the permanent mac address */
|
|
ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
|
|
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_get_num_rx_addrs_82598 - Get RX address registers
|
|
* @hw: pointer to hardware structure
|
|
*
|
|
* Returns the of RAR entries for the given adapter.
|
|
**/
|
|
u32 ixgbe_get_num_rx_addrs_82598(struct ixgbe_hw *hw)
|
|
{
|
|
UNREFERENCED_PARAMETER(hw);
|
|
|
|
return IXGBE_82598_RAR_ENTRIES;
|
|
}
|
|
|