611f86ee5f
Pointy hat to: bms
446 lines
15 KiB
C
446 lines
15 KiB
C
/**************************************************************************
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Copyright (c) 2001-2003, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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/*$FreeBSD$*/
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#ifndef _EM_H_DEFINED_
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#define _EM_H_DEFINED_
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sockio.h>
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#include <sys/sysctl.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/bpf.h>
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#include <net/if_types.h>
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#include <net/if_vlan_var.h>
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#include <netinet/in_systm.h>
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#include <netinet/in.h>
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#include <netinet/ip.h>
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#include <netinet/tcp.h>
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#include <netinet/udp.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <sys/endian.h>
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#include <sys/proc.h>
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#include "opt_bdg.h"
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#include <dev/em/if_em_hw.h>
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/* Tunables */
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/*
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* EM_MAX_TXD: Maximum number of Transmit Descriptors
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* Valid Range: 80-256 for 82542 and 82543-based adapters
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* 80-4096 for others
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* Default Value: 256
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* This value is the number of transmit descriptors allocated by the driver.
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* Increasing this value allows the driver to queue more transmits. Each
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* descriptor is 16 bytes.
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*/
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#define EM_MAX_TXD 256
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/*
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* EM_MAX_RXD - Maximum number of receive Descriptors
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* Valid Range: 80-256 for 82542 and 82543-based adapters
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* 80-4096 for others
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* Default Value: 256
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* This value is the number of receive descriptors allocated by the driver.
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* Increasing this value allows the driver to buffer more incoming packets.
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* Each descriptor is 16 bytes. A receive buffer is also allocated for each
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* descriptor. The maximum MTU size is 16110.
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*
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*/
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#define EM_MAX_RXD 256
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/*
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* EM_TIDV - Transmit Interrupt Delay Value
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value delays the generation of transmit interrupts in units of
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* 1.024 microseconds. Transmit interrupt reduction can improve CPU
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* efficiency if properly tuned for specific network traffic. If the
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* system is reporting dropped transmits, this value may be set too high
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* causing the driver to run out of available transmit descriptors.
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*/
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#define EM_TIDV 64
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/*
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* EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value, in units of 1.024 microseconds, limits the delay in which a
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* transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
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* this value ensures that an interrupt is generated after the initial
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* packet is sent on the wire within the set amount of time. Proper tuning,
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* along with EM_TIDV, may improve traffic throughput in specific
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* network conditions.
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*/
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#define EM_TADV 64
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/*
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* EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
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* Valid Range: 0-65535 (0=off)
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* Default Value: 0
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* This value delays the generation of receive interrupts in units of 1.024
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* microseconds. Receive interrupt reduction can improve CPU efficiency if
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* properly tuned for specific network traffic. Increasing this value adds
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* extra latency to frame reception and can end up decreasing the throughput
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* of TCP traffic. If the system is reporting dropped receives, this value
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* may be set too high, causing the driver to run out of available receive
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* descriptors.
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*
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* CAUTION: When setting EM_RDTR to a value other than 0, adapters
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* may hang (stop transmitting) under certain network conditions.
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* If this occurs a WATCHDOG message is logged in the system event log.
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* In addition, the controller is automatically reset, restoring the
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* network connection. To eliminate the potential for the hang
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* ensure that EM_RDTR is set to 0.
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*/
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#define EM_RDTR 0
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/*
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* Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value, in units of 1.024 microseconds, limits the delay in which a
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* receive interrupt is generated. Useful only if EM_RDTR is non-zero,
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* this value ensures that an interrupt is generated after the initial
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* packet is received within the set amount of time. Proper tuning,
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* along with EM_RDTR, may improve traffic throughput in specific network
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* conditions.
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*/
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#define EM_RADV 64
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/*
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* This parameter controls the maximum no of times the driver will loop
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* in the isr.
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* Minimum Value = 1
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*/
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#define EM_MAX_INTR 3
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/*
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* Inform the stack about transmit checksum offload capabilities.
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*/
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#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
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/*
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* This parameter controls the duration of transmit watchdog timer.
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*/
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#define EM_TX_TIMEOUT 5 /* set to 5 seconds */
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/*
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* This parameter controls when the driver calls the routine to reclaim
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* transmit descriptors.
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*/
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#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8
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/*
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* This parameter controls whether or not autonegotation is enabled.
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* 0 - Disable autonegotiation
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* 1 - Enable autonegotiation
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*/
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#define DO_AUTO_NEG 1
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/*
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* This parameter control whether or not the driver will wait for
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* autonegotiation to complete.
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* 1 - Wait for autonegotiation to complete
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* 0 - Don't wait for autonegotiation to complete
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*/
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#define WAIT_FOR_AUTO_NEG_DEFAULT 0
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/*
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* EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
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* with 82541/82547 devices and some switches. See the "Known Limitations" section of
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* the README file for a complete description and a list of affected switches.
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*
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* 0 = Hardware default
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* 1 = Master mode
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* 2 = Slave mode
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* 3 = Auto master/slave
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*/
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/* #define EM_MASTER_SLAVE 2 */
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/* Tunables -- End */
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#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
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ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
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ADVERTISE_1000_FULL)
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#define EM_VENDOR_ID 0x8086
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#define EM_MMBA 0x0010 /* Mem base address */
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#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
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#define EM_JUMBO_PBA 0x00000028
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#define EM_DEFAULT_PBA 0x00000030
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#define EM_SMARTSPEED_DOWNSHIFT 3
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#define EM_SMARTSPEED_MAX 15
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#define MAX_NUM_MULTICAST_ADDRESSES 128
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#define PCI_ANY_ID (~0U)
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#define ETHER_ALIGN 2
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/* Defines for printing debug information */
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#define DEBUG_INIT 0
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#define DEBUG_IOCTL 0
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#define DEBUG_HW 0
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#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
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#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
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#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
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#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
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#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
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#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
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#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
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#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
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#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
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/* Supported RX Buffer Sizes */
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#define EM_RXBUFFER_2048 2048
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#define EM_RXBUFFER_4096 4096
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#define EM_RXBUFFER_8192 8192
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#define EM_RXBUFFER_16384 16384
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#define EM_MAX_SCATTER 64
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/* ******************************************************************************
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* vendor_info_array
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*
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* This array contains the list of Subvendor/Subdevice IDs on which the driver
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* should load.
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*
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* ******************************************************************************/
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typedef struct _em_vendor_info_t {
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unsigned int vendor_id;
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unsigned int device_id;
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unsigned int subvendor_id;
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unsigned int subdevice_id;
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unsigned int index;
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} em_vendor_info_t;
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struct em_buffer {
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struct mbuf *m_head;
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bus_dmamap_t map; /* bus_dma map for packet */
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};
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struct em_q {
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bus_dmamap_t map; /* bus_dma map for packet */
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int nsegs; /* # of segments/descriptors */
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bus_dma_segment_t segs[EM_MAX_SCATTER];
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};
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/*
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* Bus dma allocation structure used by
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* em_dma_malloc and em_dma_free.
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*/
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struct em_dma_alloc {
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bus_addr_t dma_paddr;
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caddr_t dma_vaddr;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_dma_segment_t dma_seg;
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bus_size_t dma_size;
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int dma_nseg;
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};
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typedef enum _XSUM_CONTEXT_T {
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OFFLOAD_NONE,
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OFFLOAD_TCP_IP,
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OFFLOAD_UDP_IP
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} XSUM_CONTEXT_T;
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struct adapter;
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struct em_int_delay_info {
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struct adapter *adapter; /* Back-pointer to the adapter struct */
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int offset; /* Register offset to read/write */
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int value; /* Current value in usecs */
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};
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/* For 82544 PCIX Workaround */
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typedef struct _ADDRESS_LENGTH_PAIR
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{
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u_int64_t address;
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u_int32_t length;
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} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
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typedef struct _DESCRIPTOR_PAIR
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{
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ADDRESS_LENGTH_PAIR descriptor[4];
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u_int32_t elements;
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} DESC_ARRAY, *PDESC_ARRAY;
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/* Our adapter structure */
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struct adapter {
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struct arpcom interface_data;
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struct adapter *next;
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struct adapter *prev;
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struct em_hw hw;
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/* FreeBSD operating-system-specific structures */
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struct em_osdep osdep;
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struct device *dev;
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struct resource *res_memory;
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struct resource *res_ioport;
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struct resource *res_interrupt;
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void *int_handler_tag;
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struct ifmedia media;
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struct callout timer;
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struct callout tx_fifo_timer;
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int io_rid;
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u_int8_t unit;
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struct mtx mtx;
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/* Info about the board itself */
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u_int32_t part_num;
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u_int8_t link_active;
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u_int16_t link_speed;
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u_int16_t link_duplex;
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u_int32_t smartspeed;
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struct em_int_delay_info tx_int_delay;
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struct em_int_delay_info tx_abs_int_delay;
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struct em_int_delay_info rx_int_delay;
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struct em_int_delay_info rx_abs_int_delay;
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XSUM_CONTEXT_T active_checksum_context;
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/*
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* Transmit definitions
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*
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* We have an array of num_tx_desc descriptors (handled
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* by the controller) paired with an array of tx_buffers
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* (at tx_buffer_area).
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* The index of the next available descriptor is next_avail_tx_desc.
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* The number of remaining tx_desc is num_tx_desc_avail.
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*/
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struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
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struct em_tx_desc *tx_desc_base;
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u_int32_t next_avail_tx_desc;
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u_int32_t oldest_used_tx_desc;
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volatile u_int16_t num_tx_desc_avail;
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u_int16_t num_tx_desc;
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u_int32_t txd_cmd;
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struct em_buffer *tx_buffer_area;
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bus_dma_tag_t txtag; /* dma tag for tx */
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/*
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* Receive definitions
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*
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* we have an array of num_rx_desc rx_desc (handled by the
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* controller), and paired with an array of rx_buffers
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* (at rx_buffer_area).
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* The next pair to check on receive is at offset next_rx_desc_to_check
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*/
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struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
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struct em_rx_desc *rx_desc_base;
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u_int32_t next_rx_desc_to_check;
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u_int16_t num_rx_desc;
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u_int32_t rx_buffer_len;
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struct em_buffer *rx_buffer_area;
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bus_dma_tag_t rxtag;
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/* Jumbo frame */
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struct mbuf *fmp;
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struct mbuf *lmp;
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/* Misc stats maintained by the driver */
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unsigned long dropped_pkts;
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unsigned long mbuf_alloc_failed;
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unsigned long mbuf_cluster_failed;
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unsigned long no_tx_desc_avail1;
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unsigned long no_tx_desc_avail2;
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unsigned long no_tx_map_avail;
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unsigned long no_tx_dma_setup;
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/* Used in for 82547 10Mb Half workaround */
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#define EM_PBA_BYTES_SHIFT 0xA
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#define EM_TX_HEAD_ADDR_SHIFT 7
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#define EM_PBA_TX_MASK 0xFFFF0000
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#define EM_FIFO_HDR 0x10
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#define EM_82547_PKT_THRESH 0x3e0
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u_int32_t tx_fifo_size;
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u_int32_t tx_fifo_head;
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u_int32_t tx_fifo_head_addr;
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u_int64_t tx_fifo_reset_cnt;
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u_int64_t tx_fifo_wrk_cnt;
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u_int32_t tx_head_addr;
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/* For 82544 PCIX Workaround */
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boolean_t pcix_82544;
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boolean_t in_detach;
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#ifdef DBG_STATS
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unsigned long no_pkts_avail;
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unsigned long clean_tx_interrupts;
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#endif
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struct em_hw_stats stats;
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};
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#define EM_LOCK_INIT(_sc, _name) \
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mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
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#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx)
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#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx)
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#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
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#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
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#endif /* _EM_H_DEFINED_ */
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