fdead95125
tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
714 lines
18 KiB
C
714 lines
18 KiB
C
/*-
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* Copyright (c) 2000 Doug Rabson
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* Copyright (c) 2000 Ruslan Ermilov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
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* 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/lockmgr.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <pci/agppriv.h>
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#include <pci/agpreg.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pageout.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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MALLOC_DECLARE(M_AGP);
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#define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off)
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#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
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#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
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#define CHIP_I810 0 /* i810/i815 */
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#define CHIP_I830 1 /* 830M/845G */
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#define CHIP_I855 2 /* 852GM/855GM/865G */
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struct agp_i810_softc {
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struct agp_softc agp;
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_gatt *gatt;
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int chiptype; /* i810-like or i830 */
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u_int32_t dcache_size; /* i810 only */
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u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */
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device_t bdev; /* bridge device */
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struct resource *regs; /* memory mapped GC registers */
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bus_space_tag_t bst; /* bus_space tag */
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bus_space_handle_t bsh; /* bus_space handle */
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};
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static const char*
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agp_i810_match(device_t dev)
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{
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if (pci_get_class(dev) != PCIC_DISPLAY
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|| pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
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return NULL;
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switch (pci_get_devid(dev)) {
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case 0x71218086:
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return ("Intel 82810 (i810 GMCH) SVGA controller");
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case 0x71238086:
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return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller");
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case 0x71258086:
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return ("Intel 82810E (i810E GMCH) SVGA controller");
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case 0x11328086:
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return ("Intel 82815 (i815 GMCH) SVGA controller");
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case 0x35778086:
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return ("Intel 82830M (830M GMCH) SVGA controller");
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case 0x25628086:
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return ("Intel 82845G (845G GMCH) SVGA controller");
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case 0x35828086:
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switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
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case AGP_I855_GME:
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return ("Intel 82855GME (855GME GMCH) SVGA controller");
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case AGP_I855_GM:
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return ("Intel 82855GM (855GM GMCH) SVGA controller");
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case AGP_I852_GME:
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return ("Intel 82852GME (852GME GMCH) SVGA controller");
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case AGP_I852_GM:
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return ("Intel 82852GM (852GM GMCH) SVGA controller");
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default:
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return ("Intel 8285xM (85xGM GMCH) SVGA controller");
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}
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case 0x25728086:
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return ("Intel 82865G (865G GMCH) SVGA controller");
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};
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return NULL;
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}
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/*
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* Find bridge device.
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*/
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static device_t
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agp_i810_find_bridge(device_t dev)
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{
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device_t *children, child;
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int nchildren, i;
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u_int32_t devid;
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/*
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* Calculate bridge device's ID.
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*/
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devid = pci_get_devid(dev);
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switch (devid) {
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case 0x71218086:
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case 0x71238086:
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case 0x71258086:
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devid -= 0x10000;
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break;
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case 0x11328086:
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case 0x35778086:
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case 0x25628086:
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case 0x35828086:
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case 0x25728086:
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devid -= 0x20000;
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break;
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};
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if (device_get_children(device_get_parent(dev), &children, &nchildren))
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return 0;
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for (i = 0; i < nchildren; i++) {
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child = children[i];
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if (pci_get_devid(child) == devid) {
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free(children, M_TEMP);
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return child;
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}
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}
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free(children, M_TEMP);
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return 0;
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}
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static int
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agp_i810_probe(device_t dev)
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{
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const char *desc;
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desc = agp_i810_match(dev);
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if (desc) {
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device_t bdev;
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u_int8_t smram;
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int devid = pci_get_devid(dev);
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bdev = agp_i810_find_bridge(dev);
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if (!bdev) {
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if (bootverbose)
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printf("I810: can't find bridge device\n");
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return ENXIO;
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}
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/*
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* checking whether internal graphics device has been activated.
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*/
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if ( (devid == 0x71218086 ) ||
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(devid == 0x71238086 ) ||
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(devid == 0x71258086 ) ||
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(devid == 0x11328086 ) ) {
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smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
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if ((smram & AGP_I810_SMRAM_GMS)
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== AGP_I810_SMRAM_GMS_DISABLED) {
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if (bootverbose)
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printf("I810: disabled, not probing\n");
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return ENXIO;
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}
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} else { /* I830MG */
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unsigned int gcc1;
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gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
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if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED) {
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if (bootverbose)
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printf("I830: disabled, not probing\n");
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return ENXIO;
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}
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}
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device_verbose(dev);
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device_set_desc(dev, desc);
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return 0;
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}
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return ENXIO;
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}
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static int
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agp_i810_attach(device_t dev)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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struct agp_gatt *gatt;
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int error, rid;
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sc->bdev = agp_i810_find_bridge(dev);
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if (!sc->bdev)
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return ENOENT;
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error = agp_generic_attach(dev);
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if (error)
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return error;
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switch (pci_get_devid(dev)) {
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case 0x71218086:
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case 0x71238086:
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case 0x71258086:
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case 0x11328086:
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sc->chiptype = CHIP_I810;
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break;
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case 0x35778086:
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case 0x25628086:
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sc->chiptype = CHIP_I830;
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break;
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case 0x35828086:
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case 0x25728086:
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sc->chiptype = CHIP_I855;
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break;
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};
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/* Same for i810 and i830 */
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rid = AGP_I810_MMADR;
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sc->regs = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
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0, ~0, 1, RF_ACTIVE);
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if (!sc->regs) {
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agp_generic_detach(dev);
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return ENOMEM;
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}
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sc->bst = rman_get_bustag(sc->regs);
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sc->bsh = rman_get_bushandle(sc->regs);
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sc->initial_aperture = AGP_GET_APERTURE(dev);
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gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
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if (!gatt) {
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agp_generic_detach(dev);
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return ENOMEM;
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}
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sc->gatt = gatt;
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gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
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if ( sc->chiptype == CHIP_I810 ) {
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/* Some i810s have on-chip memory called dcache */
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if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
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sc->dcache_size = 4 * 1024 * 1024;
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else
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sc->dcache_size = 0;
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/* According to the specs the gatt on the i810 must be 64k */
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gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0,
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0, ~0, PAGE_SIZE, 0);
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if (!gatt->ag_virtual) {
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if (bootverbose)
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device_printf(dev, "contiguous allocation failed\n");
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free(gatt, M_AGP);
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agp_generic_detach(dev);
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return ENOMEM;
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}
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bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
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gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
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agp_flush_cache();
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/* Install the GATT. */
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WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
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} else if ( sc->chiptype == CHIP_I830 ) {
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/* The i830 automatically initializes the 128k gatt on boot. */
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unsigned int gcc1, pgtblctl;
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gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
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switch (gcc1 & AGP_I830_GCC1_GMS) {
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case AGP_I830_GCC1_GMS_STOLEN_512:
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sc->stolen = (512 - 132) * 1024 / 4096;
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break;
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case AGP_I830_GCC1_GMS_STOLEN_1024:
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sc->stolen = (1024 - 132) * 1024 / 4096;
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break;
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case AGP_I830_GCC1_GMS_STOLEN_8192:
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sc->stolen = (8192 - 132) * 1024 / 4096;
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break;
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default:
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sc->stolen = 0;
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device_printf(dev, "unknown memory configuration, disabling\n");
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agp_generic_detach(dev);
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return EINVAL;
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}
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if (sc->stolen > 0)
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device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
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device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
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/* GATT address is already in there, make sure it's enabled */
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pgtblctl = READ4(AGP_I810_PGTBL_CTL);
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pgtblctl |= 1;
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WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
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gatt->ag_physical = pgtblctl & ~1;
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} else { /* CHIP_I855 */
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/* The 855GM automatically initializes the 128k gatt on boot. */
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unsigned int gcc1, pgtblctl;
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gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
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switch (gcc1 & AGP_I855_GCC1_GMS) {
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case AGP_I855_GCC1_GMS_STOLEN_1M:
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sc->stolen = (1024 - 132) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_4M:
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sc->stolen = (4096 - 132) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_8M:
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sc->stolen = (8192 - 132) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_16M:
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sc->stolen = (16384 - 132) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_32M:
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sc->stolen = (32768 - 132) * 1024 / 4096;
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break;
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default:
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sc->stolen = 0;
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device_printf(dev, "unknown memory configuration, disabling\n");
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agp_generic_detach(dev);
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return EINVAL;
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}
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if (sc->stolen > 0)
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device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
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device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
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/* GATT address is already in there, make sure it's enabled */
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pgtblctl = READ4(AGP_I810_PGTBL_CTL);
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pgtblctl |= 1;
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WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
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gatt->ag_physical = pgtblctl & ~1;
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}
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return 0;
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}
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static int
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agp_i810_detach(device_t dev)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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int error;
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error = agp_generic_detach(dev);
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if (error)
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return error;
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/* Clear the GATT base. */
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if ( sc->chiptype == CHIP_I810 ) {
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WRITE4(AGP_I810_PGTBL_CTL, 0);
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} else {
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unsigned int pgtblctl;
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pgtblctl = READ4(AGP_I810_PGTBL_CTL);
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pgtblctl &= ~1;
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WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
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}
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/* Put the aperture back the way it started. */
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AGP_SET_APERTURE(dev, sc->initial_aperture);
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if ( sc->chiptype == CHIP_I810 ) {
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contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
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}
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free(sc->gatt, M_AGP);
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bus_release_resource(dev, SYS_RES_MEMORY,
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AGP_I810_MMADR, sc->regs);
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return 0;
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}
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static u_int32_t
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agp_i810_get_aperture(device_t dev)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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if ( sc->chiptype == CHIP_I810 ) {
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u_int16_t miscc;
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miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
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if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
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return 32 * 1024 * 1024;
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else
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return 64 * 1024 * 1024;
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} else if ( sc->chiptype == CHIP_I830 ) {
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unsigned int gcc1;
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gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
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if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
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return 64 * 1024 * 1024;
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else
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return 128 * 1024 * 1024;
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} else { /* CHIP_I855 */
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return 128 * 1024 * 1024;
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}
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}
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static int
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agp_i810_set_aperture(device_t dev, u_int32_t aperture)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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u_int16_t miscc;
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if ( sc->chiptype == CHIP_I810 ) {
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/*
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* Double check for sanity.
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*/
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if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
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device_printf(dev, "bad aperture size %d\n", aperture);
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return EINVAL;
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}
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miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
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miscc &= ~AGP_I810_MISCC_WINSIZE;
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if (aperture == 32 * 1024 * 1024)
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miscc |= AGP_I810_MISCC_WINSIZE_32;
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else
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miscc |= AGP_I810_MISCC_WINSIZE_64;
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pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
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} else if ( sc->chiptype == CHIP_I830 ) {
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unsigned int gcc1;
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if (aperture != 64 * 1024 * 1024 && aperture != 128 * 1024 * 1024) {
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device_printf(dev, "bad aperture size %d\n", aperture);
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return EINVAL;
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}
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gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
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gcc1 &= ~AGP_I830_GCC1_GMASIZE;
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if (aperture == 64 * 1024 * 1024)
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gcc1 |= AGP_I830_GCC1_GMASIZE_64;
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else
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gcc1 |= AGP_I830_GCC1_GMASIZE_128;
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pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
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} else { /* CHIP_I855 */
|
|
if (aperture != 128 * 1024 * 1024) {
|
|
device_printf(dev, "bad aperture size %d\n", aperture);
|
|
return EINVAL;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
|
|
{
|
|
struct agp_i810_softc *sc = device_get_softc(dev);
|
|
|
|
if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
|
|
device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
|
|
return EINVAL;
|
|
}
|
|
|
|
if ( sc->chiptype != CHIP_I810 ) {
|
|
if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
|
|
device_printf(dev, "trying to bind into stolen memory");
|
|
return EINVAL;
|
|
}
|
|
}
|
|
|
|
WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_unbind_page(device_t dev, int offset)
|
|
{
|
|
struct agp_i810_softc *sc = device_get_softc(dev);
|
|
|
|
if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
|
|
return EINVAL;
|
|
|
|
if ( sc->chiptype != CHIP_I810 ) {
|
|
if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
|
|
device_printf(dev, "trying to unbind from stolen memory");
|
|
return EINVAL;
|
|
}
|
|
}
|
|
|
|
WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Writing via memory mapped registers already flushes all TLBs.
|
|
*/
|
|
static void
|
|
agp_i810_flush_tlb(device_t dev)
|
|
{
|
|
}
|
|
|
|
static int
|
|
agp_i810_enable(device_t dev, u_int32_t mode)
|
|
{
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct agp_memory *
|
|
agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
|
|
{
|
|
struct agp_i810_softc *sc = device_get_softc(dev);
|
|
struct agp_memory *mem;
|
|
|
|
if ((size & (AGP_PAGE_SIZE - 1)) != 0)
|
|
return 0;
|
|
|
|
if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
|
|
return 0;
|
|
|
|
if (type == 1) {
|
|
/*
|
|
* Mapping local DRAM into GATT.
|
|
*/
|
|
if ( sc->chiptype != CHIP_I810 )
|
|
return 0;
|
|
if (size != sc->dcache_size)
|
|
return 0;
|
|
} else if (type == 2) {
|
|
/*
|
|
* Bogus mapping of a single page for the hardware cursor.
|
|
*/
|
|
if (size != AGP_PAGE_SIZE)
|
|
return 0;
|
|
}
|
|
|
|
mem = malloc(sizeof *mem, M_AGP, M_WAITOK);
|
|
mem->am_id = sc->agp.as_nextid++;
|
|
mem->am_size = size;
|
|
mem->am_type = type;
|
|
if (type != 1)
|
|
mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
|
|
atop(round_page(size)));
|
|
else
|
|
mem->am_obj = 0;
|
|
|
|
if (type == 2) {
|
|
/*
|
|
* Allocate and wire down the page now so that we can
|
|
* get its physical address.
|
|
*/
|
|
vm_page_t m;
|
|
|
|
VM_OBJECT_LOCK(mem->am_obj);
|
|
m = vm_page_grab(mem->am_obj, 0,
|
|
VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
|
|
VM_OBJECT_UNLOCK(mem->am_obj);
|
|
if ((m->flags & PG_ZERO) == 0)
|
|
pmap_zero_page(m);
|
|
vm_page_lock_queues();
|
|
mem->am_physical = VM_PAGE_TO_PHYS(m);
|
|
vm_page_wakeup(m);
|
|
vm_page_unlock_queues();
|
|
} else {
|
|
mem->am_physical = 0;
|
|
}
|
|
|
|
mem->am_offset = 0;
|
|
mem->am_is_bound = 0;
|
|
TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
|
|
sc->agp.as_allocated += size;
|
|
|
|
return mem;
|
|
}
|
|
|
|
static int
|
|
agp_i810_free_memory(device_t dev, struct agp_memory *mem)
|
|
{
|
|
struct agp_i810_softc *sc = device_get_softc(dev);
|
|
|
|
if (mem->am_is_bound)
|
|
return EBUSY;
|
|
|
|
if (mem->am_type == 2) {
|
|
/*
|
|
* Unwire the page which we wired in alloc_memory.
|
|
*/
|
|
vm_page_t m;
|
|
|
|
VM_OBJECT_LOCK(mem->am_obj);
|
|
m = vm_page_lookup(mem->am_obj, 0);
|
|
VM_OBJECT_UNLOCK(mem->am_obj);
|
|
vm_page_lock_queues();
|
|
vm_page_unwire(m, 0);
|
|
vm_page_unlock_queues();
|
|
}
|
|
|
|
sc->agp.as_allocated -= mem->am_size;
|
|
TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
|
|
if (mem->am_obj)
|
|
vm_object_deallocate(mem->am_obj);
|
|
free(mem, M_AGP);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
|
|
vm_offset_t offset)
|
|
{
|
|
struct agp_i810_softc *sc = device_get_softc(dev);
|
|
vm_offset_t i;
|
|
|
|
if (mem->am_type != 1)
|
|
return agp_generic_bind_memory(dev, mem, offset);
|
|
|
|
if ( sc->chiptype != CHIP_I810 )
|
|
return EINVAL;
|
|
|
|
for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
|
|
WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4,
|
|
i | 3);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
|
|
{
|
|
struct agp_i810_softc *sc = device_get_softc(dev);
|
|
vm_offset_t i;
|
|
|
|
if (mem->am_type != 1)
|
|
return agp_generic_unbind_memory(dev, mem);
|
|
|
|
if ( sc->chiptype != CHIP_I810 )
|
|
return EINVAL;
|
|
|
|
for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
|
|
WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static device_method_t agp_i810_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, agp_i810_probe),
|
|
DEVMETHOD(device_attach, agp_i810_attach),
|
|
DEVMETHOD(device_detach, agp_i810_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
/* AGP interface */
|
|
DEVMETHOD(agp_get_aperture, agp_i810_get_aperture),
|
|
DEVMETHOD(agp_set_aperture, agp_i810_set_aperture),
|
|
DEVMETHOD(agp_bind_page, agp_i810_bind_page),
|
|
DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
|
|
DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
|
|
DEVMETHOD(agp_enable, agp_i810_enable),
|
|
DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
|
|
DEVMETHOD(agp_free_memory, agp_i810_free_memory),
|
|
DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
|
|
DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t agp_i810_driver = {
|
|
"agp",
|
|
agp_i810_methods,
|
|
sizeof(struct agp_i810_softc),
|
|
};
|
|
|
|
static devclass_t agp_devclass;
|
|
|
|
DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0);
|
|
MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
|
|
MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
|