9df6f2a093
BUS_DMA_COHERENT attribute The minimum unit for changing "cachable" attribute is page, so call to pmap_change_attr effectively disable cache for all pages that newly allocated DMA memory region spans on. The problem is that general-purpose memory could reside on these pages too and disabling cache might affect performance. Moreover ldrex/strex operators raise Data Abort exception when accessing memory on page with "cachable" attribute off. BUS_DMA_COHERENT does nto require memory to be coherent. It just suggests to do best effort for reducing synchronization overhead. |
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