405ada37fb
This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week |
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|---|---|---|
| .. | ||
| cryptocteon | ||
| octe | ||
| usb | ||
| asm_octeon.S | ||
| ciu.c | ||
| cvmx_config.h | ||
| files.octeon1 | ||
| if_octm.c | ||
| obio.c | ||
| obiovar.h | ||
| octeon_cop2.h | ||
| octeon_cop2.S | ||
| octeon_ds1337.c | ||
| octeon_ebt3000_cf.c | ||
| octeon_gpio.c | ||
| octeon_gpiovar.h | ||
| octeon_irq.h | ||
| octeon_machdep.c | ||
| octeon_mp.c | ||
| octeon_nmi.S | ||
| octeon_pci_console.c | ||
| octeon_pcmap_regs.h | ||
| octeon_pmc.c | ||
| octeon_rnd.c | ||
| octeon_rtc.c | ||
| octeon_wdog.c | ||
| octopci_bus_space.c | ||
| octopci.c | ||
| octopcireg.h | ||
| octopcivar.h | ||
| std.octeon1 | ||
| uart_bus_octeonusart.c | ||
| uart_cpu_octeonusart.c | ||
| uart_dev_oct16550.c | ||