neel 633860276f Add support for level triggered interrupt pins on the vioapic. Prior to this ... commit level triggered interrupts would work as long as the pin was not shared among multiple interrupt sources. The vlapic now keeps track of level triggered interrupts in the trigger mode register and will forward the EOI for a level triggered interrupt to the vioapic. The vioapic in turn uses the EOI to sample the level on the pin and re-inject the vector if the pin is still asserted. The vhpet is the first consumer of level triggered interrupts and advertises that it can generate interrupts on pins 20 through 23 of the vioapic. Discussed with: grehan@		2013-11-27 22:18:08 +00:00
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iommu.c	Allocate memory pages for the guest from the host's free page queue.	2012-10-08 23:41:26 +00:00
iommu.h	Allocate memory pages for the guest from the host's free page queue.	2012-10-08 23:41:26 +00:00
ppt.c	Add support for level triggered interrupt pins on the vioapic. Prior to this	2013-11-27 22:18:08 +00:00
ppt.h	Merge projects/bhyve_npt_pmap into head.	2013-10-05 21:22:35 +00:00
vhpet.c	Add support for level triggered interrupt pins on the vioapic. Prior to this	2013-11-27 22:18:08 +00:00
vhpet.h	Add HPET device emulation to bhyve.	2013-11-25 19:04:51 +00:00
vioapic.c	Add support for level triggered interrupt pins on the vioapic. Prior to this	2013-11-27 22:18:08 +00:00
vioapic.h	Add support for level triggered interrupt pins on the vioapic. Prior to this	2013-11-27 22:18:08 +00:00
vlapic.c	Add support for level triggered interrupt pins on the vioapic. Prior to this	2013-11-27 22:18:08 +00:00
vlapic.h	Add support for level triggered interrupt pins on the vioapic. Prior to this	2013-11-27 22:18:08 +00:00