freebsd-skq/sys/mips/atheros
adrian 63418609bd Add two new CPU specific definitions - the watchdog clock frequency and
the UART clock frequency.

The AR933x and AR934x have separate PLL settings for these.
2013-07-21 03:51:24 +00:00
..
apb.c AR9330/AR9331 also needs to ACK the APB interrupt register, same as 2013-04-05 00:22:53 +00:00
apbvar.h
ar71xx_bus_space_reversed.c
ar71xx_bus_space_reversed.h
ar71xx_chip.c Add the reference clock for each supported chip. 2013-03-27 03:33:19 +00:00
ar71xx_chip.h MII related infrastructure changes. 2012-05-02 01:21:57 +00:00
ar71xx_cpudef.h Add two new CPU specific definitions - the watchdog clock frequency and 2013-07-21 03:51:24 +00:00
ar71xx_ehci.c Fix AR933x USB support - this needs the same controller initialisation 2013-04-05 02:01:05 +00:00
ar71xx_fixup.c Introduce the matching PCI ath(4) fixup code from ar71xx_pci into 2012-04-20 08:26:05 +00:00
ar71xx_fixup.h Introduce the matching PCI ath(4) fixup code from ar71xx_pci into 2012-04-20 08:26:05 +00:00
ar71xx_gpio.c Add the AR933x SoC GPIO pin count limitation. 2013-05-02 00:40:45 +00:00
ar71xx_gpiovar.h Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC. 2011-05-06 02:45:02 +00:00
ar71xx_machdep.c Print out the platform reference frequency. 2013-03-29 06:31:31 +00:00
ar71xx_ohci.c Implement better support for USB controller suspend and resume. 2011-12-14 00:28:54 +00:00
ar71xx_pci_bus_space.c
ar71xx_pci_bus_space.h
ar71xx_pci.c Mips Atheros AR71XX: make PCI base slot configurable through hints. 2013-01-06 20:50:31 +00:00
ar71xx_setup.c * Add AR9330/AR9331 to the soc identifier enum; 2013-04-05 00:22:17 +00:00
ar71xx_setup.h Add AR9341, AR9342, AR9344 SoC types. 2013-07-08 06:10:29 +00:00
ar71xx_spi.c
ar71xx_wdog.c
ar71xxreg.h Add a missing newline. 2012-05-02 06:17:16 +00:00
ar91xx_chip.c Add the reference clock for each supported chip. 2013-03-27 03:33:19 +00:00
ar91xx_chip.h
ar91xxreg.h Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC. 2011-05-06 02:45:02 +00:00
ar724x_chip.c Add the reference clock for each supported chip. 2013-03-27 03:33:19 +00:00
ar724x_chip.h
ar724x_pci.c Ensure that BAR(0) is set for the PCI slot before the ath(4) PCI registers 2012-08-26 04:39:20 +00:00
ar724xreg.h Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC. 2011-05-06 02:45:02 +00:00
ar933x_chip.c Implement USB device reset and poweron. 2013-04-05 02:02:37 +00:00
ar933x_chip.h Commit initial (unfinished!) support for the AR933x series of embedded 2013-03-27 03:38:58 +00:00
ar933x_uart.h * Fix clock register definitions 2013-03-29 06:32:02 +00:00
ar933xreg.h Implement the AR933x ethernet support. 2013-04-05 01:35:59 +00:00
ar934xreg.h Import the initial SoC register definitions for the AR934x MIPS74k SoC. 2013-07-08 06:12:38 +00:00
files.ar71xx Tie in the AR933x support into -HEAD. 2013-03-28 19:30:56 +00:00
if_arge.c Implement the AR933x ethernet support. 2013-04-05 01:35:59 +00:00
if_argevar.h Implement PLL configuration override support, similar to what openwrt 2012-05-02 07:43:11 +00:00
pcf2123_rtc.c
pcf2123reg.h
std.ar71xx Assume a big-endian default on MIPS and drop the "eb" suffix from MACHINE_ARCH. 2012-03-29 02:54:35 +00:00
uart_bus_ar71xx.c
uart_bus_ar933x.c For the AR933x UART, the serial clock is not the AHB clock, it's the 2013-03-29 06:32:39 +00:00
uart_cpu_ar71xx.c
uart_cpu_ar933x.c For the AR933x UART, the serial clock is not the AHB clock, it's the 2013-03-29 06:32:39 +00:00
uart_dev_ar933x.c Implement the AR933x interrupt driven UART code. 2013-04-05 00:26:06 +00:00
uart_dev_ar933x.h Bring over the initial, CPU-only UART support for the AR933x SoC. 2013-03-28 19:27:06 +00:00