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freebsd-skq/sys/mips/rmi/board.h
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M    rmi/xls_ehci.c
M    rmi/clock.h
M    rmi/xlr_pci.c
M    rmi/perfmon.h
M    rmi/uart_bus_xlr_iodi.c
M    rmi/perfmon_percpu.c
M    rmi/iodi.c
M    rmi/pcibus.c
M    rmi/perfmon_kern.c
M    rmi/perfmon_xlrconfig.h
M    rmi/pcibus.h
M    rmi/tick.c
M    rmi/xlr_boot1_console.c
M    rmi/debug.h
M    rmi/uart_cpu_mips_xlr.c
M    rmi/xlrconfig.h
M    rmi/interrupt.h
M    rmi/xlr_i2c.c
M    rmi/shared_structs.h
M    rmi/msgring.c
M    rmi/iomap.h
M    rmi/ehcireg.h
M    rmi/msgring.h
M    rmi/shared_structs_func.h
M    rmi/on_chip.c
M    rmi/pic.h
M    rmi/xlr_machdep.c
M    rmi/ehcivar.h
M    rmi/board.c
M    rmi/clock.c
M    rmi/shared_structs_offsets.h
M    rmi/perfmon_utils.h
M    rmi/board.h
M    rmi/msgring_xls.c
M    rmi/intr_machdep.c
2009-10-29 21:14:10 +00:00

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/*-
* Copyright (c) 2003-2009 RMI Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of RMI Corporation, nor the names of its contributors,
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* RMI_BSD */
#ifndef _RMI_BOARD_H_
#define _RMI_BOARD_H_
#define RMI_XLR_BOARD_ARIZONA_I 1
#define RMI_XLR_BOARD_ARIZONA_II 2
#define RMI_XLR_BOARD_ARIZONA_III 3
#define RMI_XLR_BOARD_ARIZONA_IV 4
#define RMI_XLR_BOARD_ARIZONA_V 5
#define RMI_XLR_BOARD_ARIZONA_VI 6
#define RMI_XLR_BOARD_ARIZONA_VII 7
#define RMI_XLR_BOARD_ARIZONA_VIII 8
#define RMI_CHIP_XLR308_A0 0x0c0600
#define RMI_CHIP_XLR508_A0 0x0c0700
#define RMI_CHIP_XLR516_A0 0x0c0800
#define RMI_CHIP_XLR532_A0 0x0c0900
#define RMI_CHIP_XLR716_A0 0x0c0a00
#define RMI_CHIP_XLR732_A0 0x0c0b00
#define RMI_CHIP_XLR308_A1 0x0c0601
#define RMI_CHIP_XLR508_A1 0x0c0701
#define RMI_CHIP_XLR516_A1 0x0c0801
#define RMI_CHIP_XLR532_A1 0x0c0901
#define RMI_CHIP_XLR716_A1 0x0c0a01
#define RMI_CHIP_XLR732_A1 0x0c0b01
#define RMI_CHIP_XLR308_B0 0x0c0602
#define RMI_CHIP_XLR508_B0 0x0c0702
#define RMI_CHIP_XLR516_B0 0x0c0802
#define RMI_CHIP_XLR532_B0 0x0c0902
#define RMI_CHIP_XLR716_B0 0x0c0a02
#define RMI_CHIP_XLR732_B0 0x0c0b02
#define RMI_CHIP_XLR308_B1 0x0c0603
#define RMI_CHIP_XLR508_B1 0x0c0703
#define RMI_CHIP_XLR516_B1 0x0c0803
#define RMI_CHIP_XLR532_B1 0x0c0903
#define RMI_CHIP_XLR716_B1 0x0c0a03
#define RMI_CHIP_XLR732_B1 0x0c0b03
#define RMI_CHIP_XLR308_B2 0x0c0604
#define RMI_CHIP_XLR508_B2 0x0c0704
#define RMI_CHIP_XLR516_B2 0x0c0804
#define RMI_CHIP_XLR532_B2 0x0c0904
#define RMI_CHIP_XLR716_B2 0x0c0a04
#define RMI_CHIP_XLR732_B2 0x0c0b04
#define RMI_CHIP_XLR308_C0 0x0c0705
#define RMI_CHIP_XLR508_C0 0x0c0b05
#define RMI_CHIP_XLR516_C0 0x0c0a05
#define RMI_CHIP_XLR532_C0 0x0c0805
#define RMI_CHIP_XLR716_C0 0x0c0205
#define RMI_CHIP_XLR732_C0 0x0c0005
#define RMI_CHIP_XLR308_C1 0x0c0706
#define RMI_CHIP_XLR508_C1 0x0c0b06
#define RMI_CHIP_XLR516_C1 0x0c0a06
#define RMI_CHIP_XLR532_C1 0x0c0806
#define RMI_CHIP_XLR716_C1 0x0c0206
#define RMI_CHIP_XLR732_C1 0x0c0006
#define RMI_CHIP_XLR308_C2 0x0c0707
#define RMI_CHIP_XLR508_C2 0x0c0b07
#define RMI_CHIP_XLR516_C2 0x0c0a07
#define RMI_CHIP_XLR532_C2 0x0c0807
#define RMI_CHIP_XLR716_C2 0x0c0207
#define RMI_CHIP_XLR732_C2 0x0c0007
#define RMI_CHIP_XLR308_C3 0x0c0708
#define RMI_CHIP_XLR508_C3 0x0c0b08
#define RMI_CHIP_XLR516_C3 0x0c0a08
#define RMI_CHIP_XLR532_C3 0x0c0808
#define RMI_CHIP_XLR716_C3 0x0c0208
#define RMI_CHIP_XLR732_C3 0x0c0008
#define RMI_CHIP_XLR308_C4 0x0c0709
#define RMI_CHIP_XLR508_C4 0x0c0b09
#define RMI_CHIP_XLR516_C4 0x0c0a09
#define RMI_CHIP_XLR532_C4 0x0c0809
#define RMI_CHIP_XLR716_C4 0x0c0209
#define RMI_CHIP_XLR732_C4 0x0c0009
#define RMI_CHIP_XLS608_A0 0x0c8000
#define RMI_CHIP_XLS408_A0 0x0c8800
#define RMI_CHIP_XLS404_A0 0x0c8c00
#define RMI_CHIP_XLS208_A0 0x0c8e00
#define RMI_CHIP_XLS204_A0 0x0c8f00
#define RMI_CHIP_XLS608_A1 0x0c8001
#define RMI_CHIP_XLS408_A1 0x0c8801
#define RMI_CHIP_XLS404_A1 0x0c8c01
#define RMI_CHIP_XLS208_A1 0x0c8e01
#define RMI_CHIP_XLS204_A1 0x0c8f01
static __inline__ unsigned int
xlr_revision(void)
{
return mips_rd_prid() & 0xff00ff;
}
static __inline__ unsigned int
xlr_is_xls(void)
{
uint32_t prid = mips_rd_prid();
return (prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000;
}
static __inline__ int
xlr_revision_a0(void)
{
return xlr_revision() == 0x0c0000;
}
static __inline__ int
xlr_revision_b0(void)
{
return xlr_revision() == 0x0c0002;
}
static __inline__ int
xlr_revision_b1(void)
{
return xlr_revision() == 0x0c0003;
}
static __inline__ int
xlr_board_atx_i(void)
{
return xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_I;
}
static __inline__ int
xlr_board_atx_ii(void)
{
return xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_II;
}
static __inline__ int
xlr_board_atx_ii_b(void)
{
return (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_II)
&& (xlr_boot1_info.board_minor_version == 1);
}
static __inline__ int
xlr_board_atx_iii(void)
{
return xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_III;
}
static __inline__ int
xlr_board_atx_iv(void)
{
return (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_IV)
&& (xlr_boot1_info.board_minor_version == 0);
}
static __inline__ int
xlr_board_atx_iv_b(void)
{
return (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_IV)
&& (xlr_boot1_info.board_minor_version == 1);
}
static __inline__ int
xlr_board_atx_v(void)
{
return xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_V;
}
static __inline__ int
xlr_board_atx_vi(void)
{
return xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI;
}
static __inline__ int
xlr_board_atx_iii_256(void)
{
return (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_III)
&& (xlr_boot1_info.board_minor_version == 0);
}
static __inline__ int
xlr_board_atx_iii_512(void)
{
return (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_III)
&& (xlr_boot1_info.board_minor_version == 1);
}
static __inline__ int
xlr_board_atx_v_512(void)
{
return (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_V)
&& (xlr_boot1_info.board_minor_version == 1);
}
static __inline__ int
xlr_board_pci(void)
{
return (xlr_board_atx_iii_256() || xlr_board_atx_iii_512()
|| xlr_board_atx_v_512());
}
static __inline__ int
xlr_is_xls2xx(void)
{
uint32_t chipid = mips_rd_prid() & 0xffffff00U;
return chipid == 0x0c8e00 || chipid == 0x0c8f00;
}
static __inline__ int
xlr_is_xls4xx(void)
{
uint32_t chipid = mips_rd_prid() & 0xffffff00U;
return chipid == 0x0c8800 || chipid == 0x0c8c00;
}
/* all our knowledge of chip and board that cannot be detected run-time goes here */
enum gmac_block_types {
XLR_GMAC, XLR_XGMAC, XLR_SPI4
};
enum gmac_block_modes {
XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII
};
struct xlr_board_info {
int is_xls;
int nr_cpus;
int usb; /* usb enabled ? */
int cfi; /* compact flash driver for NOR? */
int pci_irq;
struct stn_cc **credit_configs; /* pointer to Core station credits */
struct bucket_size *bucket_sizes; /* pointer to Core station
* bucket */
int *msgmap; /* mapping of message station to devices */
int gmacports; /* number of gmac ports on the board */
struct xlr_gmac_block_t {
int type; /* see enum gmac_block_types */
unsigned int enabled; /* mask of ports enabled */
struct stn_cc *credit_config; /* credit configuration */
int station_txbase; /* station id for tx */
int station_rfr;/* free desc bucket */
int mode; /* see gmac_block_modes */
uint32_t baseaddr; /* IO base */
int baseirq; /* first irq for this block, the rest are in
* sequence */
int baseinst; /* the first rge unit for this block */
} gmac_block[3];
};
extern struct xlr_board_info xlr_board_info;
int xlr_board_info_setup(void);
#endif
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