4fae28a084
All I/O APIC pins are masked when an I/O APIC is first probed. The APIC enumerator (MP Table or MADT) then parses its associated tables to configure individual pins to set custom delivery modes or alternate routing (e.g. routing IRQ 0 to intpin 2). Pins for regular interrupt pins are left masked until the first interrupt is assigned. However, pins with unusual settings (e.g. NMI or SMI) are never assigned an interrupt and thus never re-programmed. The I/O APIC code used to reprogram all interrupt pins during registration but this was lost in r151979. In theory, this is mostly a no-op as the ACPI APIC table does not include a way to enumerate NMI or SMI pins for the I/O APIC, so only systems using an MP Table would be affected. Reported by: avg MFC after: 1 month |
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| .. | ||
| acpica | ||
| bios | ||
| cpufreq | ||
| include | ||
| iommu | ||
| isa | ||
| pci | ||
| x86 | ||
| xen | ||