b2d758545b
via cpuctl(4) driver. Two new CPUCTL_MSRSBIT and CPUCTL_MSRCBIT ioctl(2)
calls treat the data field of the argument struct passed as a mask
and set/clear bits of the MSR register according to the mask value.
- Allow user to perform atomic bitwise AND and OR operaions on MSR registers
via cpucontrol(8) utility. Two new operations ("&=" and "|=") have been
added. The first one applies bitwise AND operaion between the current
contents of the MSR register and the mask, and the second performs bitwise
OR. The argument can be optionally prefixed with "~" inversion operator.
This allows one to mimic the "clear bit" behavior by using the command
like this:
cpucontrol -m 0x10&=~0x02 # clear the second bit of TSC MSR
Inversion operator support in all modes (assignment, OR, AND).
Approved by: re (kib)
MFC after: 1 month
158 lines
4.3 KiB
Groff
158 lines
4.3 KiB
Groff
.\" Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd June 30, 2009
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.Dt CPUCTL 4
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.Os
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.Sh NAME
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.Nm cpuctl
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.Nd cpuctl pseudo device
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following lines in your kernel
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configuration file:
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.Bd -ragged -offset indent
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.Cd "device cpuctl"
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.Ed
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.Pp
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Alternatively, to load the driver as a module
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at boot time, place the following in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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cpuctl_load="YES"
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.Ed
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.Sh DESCRIPTION
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The special device
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.Pa /dev/cpuctl
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presents interface to the system CPU.
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It provides functionality to retrieve
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CPUID information, read/write machine specific registers (MSR) and perform
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CPU firmware updates.
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.Pp
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For each CPU present in the system, the special device
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.Pa /dev/cpuctl%d
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with the appropriate index will be created.
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For multicore CPUs such a
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special device will be created for each core.
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.Pp
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Currently, only i386 and amd64 processors are
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supported.
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.Sh IOCTL INTERFACE
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All of the supported operations are invoked using the
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.Xr ioctl 2
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system call.
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Currently, the following ioctls are defined:
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.Bl -tag -width CPUCTL_UPDATE
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.It Dv CPUCTL_RDMSR Fa cpuctl_msr_args_t *args
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.It Dv CPUCTL_WRMSR Fa cpuctl_msr_args_t *args
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Read/write CPU machine specific register.
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The
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.Vt cpuctl_msr_args_t
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structure is defined in
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.In sys/cpuctl.h
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as:
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.Pp
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.Bd -literal
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typedef struct {
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int msr; /* MSR to read */
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uint64_t data;
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} cpuctl_msr_args_t;
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.Ed
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.It Dv CPUCTL_MSRSBIT Fa cpuctl_msr_args_t *args
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.It Dv CPUCTL_MSRCBIT Fa cpuctl_msr_args_t *args
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Set/clear MSR bits according to the mask given in the
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.Va data
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field.
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.It Dv CPUCTL_CPUID Fa cpuctl_cpuid_args_t *args
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Retrieve CPUID information.
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Arguments are supplied in
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the following struct:
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.Pp
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.Bd -literal
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typedef struct {
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int level; /* CPUID level */
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uint32_t data[4];
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} cpuctl_cpuid_args_t;
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.Ed
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.Pp
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The
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.Va level
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field indicates the CPUID level to retrieve information for, while the
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.Va data
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field is used to store the received CPUID data.
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.It Dv CPUCTL_UPDATE cpuctl_update_args_t *args
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Update CPU firmware (microcode).
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The structure is defined in
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.In sys/cpuctl.h
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as:
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.Pp
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.Bd -literal
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typedef struct {
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void *data;
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size_t size;
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} cpuctl_update_args_t;
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.Ed
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.Pp
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The
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.Va data
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field should point to the firmware image of size
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.Va size .
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.El
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.Pp
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For additional information refer to
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.Pa cpuctl.h .
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.Sh RETURN VALUES
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.Bl -tag -width Er
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.It Bq Er ENXIO
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The operation requested is not supported by the device (e.g. unsupported
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architecture or the CPU is disabled)
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.It Bq Er EINVAL
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Incorrect request was supplied, or microcode image is not correct.
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.It Bq Er ENOMEM
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No physical memory was available to complete the request.
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.It Bq Er EFAULT
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The firmware image address points outside the process address space.
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.El
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.Sh FILES
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.Bl -tag -width /dev/cpuctl -compact
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.It Pa /dev/cpuctl
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.El
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.Sh SEE ALSO
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.Xr hwpmc 4 ,
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.Xr cpucontrol 8
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.Sh HISTORY
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The
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.Nm
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driver first appeared in
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.Fx 7.2 .
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.Sh BUGS
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Yes, probably, report if any.
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.Sh AUTHORS
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The
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.Nm
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module and this manual page were written by
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.An Stanislav Sedov Aq stas@FreeBSD.org .
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