c0c76118d8
generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k
64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/*
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* Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef _ATH_AR9280_H_
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#define _ATH_AR9280_H_
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#include "ar5416/ar5416.h"
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/*
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* This is a chip thing, but it's used here as part of the
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* ath_hal_9280 struct; so it's convienent to locate the
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* define here.
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*/
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#define AR9280_TX_GAIN_TABLE_SIZE 22
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struct ath_hal_9280 {
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struct ath_hal_5416 ah_5416;
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HAL_INI_ARRAY ah_ini_xmodes;
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HAL_INI_ARRAY ah_ini_rxgain;
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HAL_INI_ARRAY ah_ini_txgain;
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int PDADCdelta;
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uint32_t originalGain[AR9280_TX_GAIN_TABLE_SIZE];
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};
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#define AH9280(_ah) ((struct ath_hal_9280 *)(_ah))
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#define AR9280_DEFAULT_RXCHAINMASK 3
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#define AR9285_DEFAULT_RXCHAINMASK 1
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#define AR9280_DEFAULT_TXCHAINMASK 1
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#define AR9285_DEFAULT_TXCHAINMASK 1
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#define AR_PHY_CCA_NOM_VAL_9280_2GHZ -112
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#define AR_PHY_CCA_NOM_VAL_9280_5GHZ -112
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#define AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ -127
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#define AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ -122
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#define AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ -97
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#define AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ -102
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HAL_BOOL ar9280RfAttach(struct ath_hal *, HAL_STATUS *);
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struct ath_hal;
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HAL_BOOL ar9280SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING);
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void ar9280SpurMitigate(struct ath_hal *,
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const struct ieee80211_channel *);
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#endif /* _ATH_AR9280_H_ */
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