c63dab466c
Also some minor style cleanups.
224 lines
5.4 KiB
C
224 lines
5.4 KiB
C
/*-
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* Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* DEC PDQ FDDI Controller; code for BSD derived operating systems
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*
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* This module supports the DEC DEFPA PCI FDDI Controller
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_media.h>
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#include <net/fddi.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pdq/pdq_freebsd.h>
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#include <dev/pdq/pdqreg.h>
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#define DEC_VENDORID 0x1011
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#define DEFPA_CHIPID 0x000F
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#define DEFPA_LATENCY 0x88
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#define PCI_CFLT 0x0C /* Configuration Latency */
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#define PCI_CBMA 0x10 /* Configuration Base Memory Address */
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#define PCI_CBIO 0x14 /* Configuration Base I/O Address */
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static int pdq_pci_probe (device_t);
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static int pdq_pci_attach (device_t);
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static int pdq_pci_detach (device_t);
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static void pdq_pci_shutdown (device_t);
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static void pdq_pci_ifintr (void *);
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static void
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pdq_pci_ifintr(void *arg)
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{
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device_t dev;
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pdq_softc_t *sc;
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dev = (device_t)arg;
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sc = device_get_softc(dev);
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PDQ_LOCK(sc);
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(void) pdq_interrupt(sc->sc_pdq);
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PDQ_UNLOCK(sc);
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return;
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}
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/*
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* This is the PCI configuration support.
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*/
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static int
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pdq_pci_probe(device_t dev)
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{
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if (pci_get_vendor(dev) == DEC_VENDORID &&
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pci_get_device(dev) == DEFPA_CHIPID) {
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device_set_desc(dev, "Digital DEFPA PCI FDDI Controller");
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return (0);
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}
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return (ENXIO);
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}
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static int
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pdq_pci_attach(device_t dev)
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{
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pdq_softc_t *sc;
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struct ifnet *ifp;
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u_int32_t command;
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int error;
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sc = device_get_softc(dev);
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ifp = &sc->arpcom.ac_if;
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sc->dev = dev;
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/*
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* Map control/status registers.
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*/
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pci_enable_busmaster(dev);
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command = pci_read_config(dev, PCIR_LATTIMER, 1);
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if (command < DEFPA_LATENCY) {
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command = DEFPA_LATENCY;
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pci_write_config(dev, PCIR_LATTIMER, command, 1);
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}
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sc->mem_rid = PCI_CBMA;
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sc->mem_type = SYS_RES_MEMORY;
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sc->mem = bus_alloc_resource(dev, sc->mem_type, &sc->mem_rid,
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0, ~0, 1, RF_ACTIVE);
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if (!sc->mem) {
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device_printf(dev, "Unable to allocate I/O space resource.\n");
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error = ENXIO;
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goto bad;
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}
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sc->mem_bsh = rman_get_bushandle(sc->mem);
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sc->mem_bst = rman_get_bustag(sc->mem);
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sc->irq_rid = 0;
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sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
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0, ~0, 1, RF_SHAREABLE | RF_ACTIVE);
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if (!sc->irq) {
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device_printf(dev, "Unable to allocate interrupt resource.\n");
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error = ENXIO;
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goto bad;
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}
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ifp->if_name = "fpa";
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ifp->if_unit = device_get_unit(dev);
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sc->sc_pdq = pdq_initialize(sc->mem_bst, sc->mem_bsh,
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ifp->if_name, ifp->if_unit,
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(void *)sc, PDQ_DEFPA);
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if (sc->sc_pdq == NULL) {
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device_printf(dev, "Initialization failed.\n");
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error = ENXIO;
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goto bad;
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}
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error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
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pdq_pci_ifintr, dev, &sc->irq_ih);
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if (error) {
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device_printf(dev, "Failed to setup interrupt handler.\n");
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error = ENXIO;
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goto bad;
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}
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bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
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(caddr_t) sc->arpcom.ac_enaddr, FDDI_ADDR_LEN);
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pdq_ifattach(sc);
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return (0);
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bad:
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pdq_free(dev);
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return (error);
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}
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static int
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pdq_pci_detach (dev)
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device_t dev;
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{
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pdq_softc_t *sc;
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sc = device_get_softc(dev);
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pdq_ifdetach(sc);
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return (0);
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}
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static void
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pdq_pci_shutdown(device_t dev)
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{
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pdq_softc_t *sc;
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sc = device_get_softc(dev);
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pdq_hwreset(sc->sc_pdq);
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return;
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}
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static device_method_t pdq_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, pdq_pci_probe),
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DEVMETHOD(device_attach, pdq_pci_attach),
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DEVMETHOD(device_detach, pdq_pci_detach),
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DEVMETHOD(device_shutdown, pdq_pci_shutdown),
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{ 0, 0 }
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};
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static driver_t pdq_pci_driver = {
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"fpa",
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pdq_pci_methods,
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sizeof(pdq_softc_t),
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};
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DRIVER_MODULE(fpa, pci, pdq_pci_driver, pdq_devclass, 0, 0);
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MODULE_DEPEND(fpa, pci, 1, 1, 1);
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MODULE_DEPEND(fpa, fddi, 1, 1, 1);
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