660df75e8b
Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month |
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adm5120 | ||
alchemy | ||
atheros | ||
cavium | ||
compile | ||
conf | ||
idt | ||
include | ||
malta | ||
mips | ||
rmi | ||
sentry5 | ||
sibyte |