6892c8a3be
reading registers from other CPUs. As it turns out, the hardware doesn't really like concurrent IPI'ing causing adverse effects. Also the thought deadlock when using this spin lock here and the targeted CPU(s) are also holding or in case of nested locks can't actually happen. This is due to the fact that on sparc64, spinlock_enter() only raises the PIL but doesn't disable interrupts completely. Thus direct cross calls as used for the register reading (and all other MD IPI needs) still will be executed by the targeted CPU(s) in that case. MFC after: 3 days |
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.. | ||
central | ||
compile | ||
conf | ||
ebus | ||
fhc | ||
include | ||
isa | ||
pci | ||
sbus | ||
sparc64 |