Oleksandr Tymoshenko 95a3636709 [gpio] Add GPIO driver for Intel Bay Trail SoC
Bay Trail has three banks of GPIOs exposed to userland as /dev/gpiocN,
where N is 1, 2, and 3. Pins in each bank are pre-named to match names
on boards schematics: GPIO_S0_SCnn, GPIO_S0_NCnn, and GPIO_S5_nn.

Controller supports edge-triggered and level-triggered interrupts but
current version of the driver does not have interrupts support
2016-11-04 16:24:38 +00:00
..
2016-10-31 13:12:58 +00:00
2015-04-16 22:34:10 +00:00
2016-07-08 00:12:29 +00:00
2016-10-31 05:58:11 +00:00
2016-10-04 16:29:26 +00:00