4ae869175b
specially aml8726-m6 and aml8726-m8b SoC based devices. aml8726-m6 SoC exist in devices such as Visson ATV-102. Hardkernel ODROID-C1 board has aml8726-m8b SoC. The following support is included: Basic machdep code SMP Interrupt controller Clock control driver (aka gate) Pinctrl Timer Real time clock UART GPIO I2C SD controller SDXC controller USB Watchdog Random number generator PLL / Clock frequency measurement Frame buffer Submitted by: John Wehle Approved by: stas (mentor)
181 lines
4.3 KiB
C
181 lines
4.3 KiB
C
/*-
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* Copyright 2013-2015 John Wehle <john@feith.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Amlogic aml8726 UART console driver.
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*
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* This is only necessary to use when debugging early boot code.
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* The standard uart driver is available for use later in the boot.
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*
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* It's assumed the SoC uart is mapped into AML_UART_KVM_BASE meaning
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* when using EARLY_PRINTF you'll need to define SOCDEV_VA to be
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* 0xd8100000 and SOCDEV_PA to be 0xc8100000 in your config file.
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*/
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#include "opt_global.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/cons.h>
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#include <sys/consio.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <arm/amlogic/aml8726/aml8726_machdep.h>
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#include <arm/amlogic/aml8726/aml8726_uart.h>
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#define AML_UART_KVM_BASE (aml8726_aobus_kva_base + 0x130 * 4)
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static uint32_t
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ub_getreg(uint32_t off)
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{
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return *((volatile uint32_t *)(AML_UART_KVM_BASE + off));
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}
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static void
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ub_setreg(uint32_t off, uint32_t val)
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{
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*((volatile uint32_t *)(AML_UART_KVM_BASE + off)) = val;
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}
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static void
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uart_cnprobe(struct consdev *cp)
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{
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sprintf(cp->cn_name, "uart");
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cp->cn_pri = CN_REMOTE;
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}
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static void
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uart_cngrab(struct consdev *cp)
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{
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}
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static void
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uart_cnungrab(struct consdev *cp)
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{
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}
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static void
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uart_cninit(struct consdev *cp)
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{
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uint32_t cr;
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uint32_t mr;
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#ifdef EARLY_PRINTF
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if (early_putc != NULL) {
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printf("Early printf yielding control to the real console.\n");
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early_putc = NULL;
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}
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/*
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* Give pending characters a chance to drain.
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*/
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DELAY(4000);
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#endif
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cr = ub_getreg(AML_UART_CONTROL_REG);
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/* Disable all interrupt sources. */
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cr &= ~(AML_UART_CONTROL_TX_INT_EN | AML_UART_CONTROL_RX_INT_EN);
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/* Reset the transmitter and receiver. */
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cr |= (AML_UART_CONTROL_TX_RST | AML_UART_CONTROL_RX_RST);
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/* Use two wire mode. */
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cr |= AML_UART_CONTROL_TWO_WIRE_EN;
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/* Enable the transmitter and receiver. */
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cr |= (AML_UART_CONTROL_TX_EN | AML_UART_CONTROL_RX_EN);
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ub_setreg(AML_UART_CONTROL_REG, cr);
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/* Clear RX FIFO level for generating interrupts. */
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mr = ub_getreg(AML_UART_MISC_REG);
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mr &= ~AML_UART_MISC_RECV_IRQ_CNT_MASK;
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ub_setreg(AML_UART_MISC_REG, mr);
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/* Ensure the reset bits are clear. */
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cr &= ~(AML_UART_CONTROL_TX_RST | AML_UART_CONTROL_RX_RST);
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ub_setreg(AML_UART_CONTROL_REG, cr);
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}
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static void
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uart_cnterm(struct consdev * cp)
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{
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}
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static void
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uart_cnputc(struct consdev *cp, int c)
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{
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while ((ub_getreg(AML_UART_STATUS_REG) &
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AML_UART_STATUS_TX_FIFO_FULL) != 0)
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cpu_spinwait();
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ub_setreg(AML_UART_WFIFO_REG, c);
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}
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static int
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uart_cngetc(struct consdev * cp)
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{
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int c;
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if ((ub_getreg(AML_UART_STATUS_REG) &
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AML_UART_STATUS_RX_FIFO_EMPTY) != 0)
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return (-1);
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c = ub_getreg(AML_UART_RFIFO_REG) & 0xff;
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return (c);
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}
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CONSOLE_DRIVER(uart);
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#ifdef EARLY_PRINTF
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#if !(defined(SOCDEV_PA) && defined(SOCDEV_VA))
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#error SOCDEV_PA and SOCDEV_VA must be defined.
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#endif
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static void
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eputc(int c)
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{
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if (c == '\n')
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eputc('\r');
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uart_cnputc(NULL, c);
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}
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early_putc_t *early_putc = eputc;
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#endif
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