6b74f9b7f5
* Use the cpu_idle_hook() to do idling for C1-C3. * Use both _CST and the FADT to detect Cx states. * Use both _PTC and P_CNT for controlling throttling. * Add a notify handler to detect changes in _CST and _PSS * Call the _INI function for each processor if present. This will be done by ACPI-CA in the future. * Fix a bug on SMP systems where CPUs will attach multiple times if the bus is rescan. * Document new sysctls for controlling idling.
1051 lines
30 KiB
C
1051 lines
30 KiB
C
/*-
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* Copyright (c) 2003 Nate Lawson
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* Copyright (c) 2001 Michael Smith
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <sys/power.h>
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#include <sys/sbuf.h>
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#include <sys/pcpu.h>
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#include <sys/smp.h>
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#include <dev/pci/pcivar.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#ifdef __ia64__
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#include <machine/pal.h>
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#endif
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#include "acpi.h"
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#include <dev/acpica/acpivar.h>
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/*
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* Support for ACPI Processor devices, including ACPI 2.0 throttling
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* and C[1-3] sleep states.
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*
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* TODO: implement scans of all CPUs to be sure all Cx states are
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* equivalent.
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*/
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/* Hooks for the ACPI CA debugging infrastructure */
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#define _COMPONENT ACPI_PROCESSOR
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ACPI_MODULE_NAME("PROCESSOR")
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struct acpi_cx {
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struct resource *p_lvlx; /* Register to read to enter state. */
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uint32_t type; /* C1-3 (C4 and up treated as C3). */
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uint32_t trans_lat; /* Transition latency (usec). */
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uint32_t power; /* Power consumed (mW). */
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};
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#define MAX_CX_STATES 8
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struct acpi_cx_stats {
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int long_slp; /* Count of sleeps >= trans_lat. */
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int short_slp; /* Count of sleeps < trans_lat. */
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};
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struct acpi_cpu_softc {
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device_t cpu_dev;
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ACPI_HANDLE cpu_handle;
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uint32_t cpu_id; /* ACPI processor id */
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struct resource *cpu_p_cnt; /* Throttling control register */
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struct acpi_cx cpu_cx_states[MAX_CX_STATES];
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int cpu_bm_ok; /* Bus mastering control available. */
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};
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#define CPU_GET_REG(reg, width) \
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(bus_space_read_ ## width(rman_get_bustag((reg)), \
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rman_get_bushandle((reg)), 0))
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#define CPU_SET_REG(reg, width, val) \
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(bus_space_write_ ## width(rman_get_bustag((reg)), \
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rman_get_bushandle((reg)), 0, (val)))
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/*
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* Speeds are stored in counts, from 1 - CPU_MAX_SPEED, and
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* reported to the user in tenths of a percent.
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*/
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static uint32_t cpu_duty_offset;
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static uint32_t cpu_duty_width;
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#define CPU_MAX_SPEED (1 << cpu_duty_width)
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#define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED)
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#define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
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(CPU_SPEED_PERCENT(x) % 10)
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#define CPU_P_CNT_THT_EN (1<<4)
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#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
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#define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
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#define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */
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#define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */
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#define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */
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#define PCI_VENDOR_INTEL 0x8086
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#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
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#define PCI_REVISION_A_STEP 0
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#define PCI_REVISION_B_STEP 1
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#define PCI_REVISION_4E 2
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#define PCI_REVISION_4M 3
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/* Platform hardware resource information. */
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static uint32_t cpu_p_blk; /* ACPI P_BLK location */
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static uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
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static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
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static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */
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static uint32_t cpu_rid; /* Driver-wide resource id. */
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static uint32_t cpu_quirks; /* Indicate any hardware bugs. */
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/* Runtime state. */
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static int cpu_cx_count; /* Number of valid states */
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static uint32_t cpu_cx_next; /* State to use for next sleep. */
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static uint32_t cpu_non_c3; /* Index of lowest non-C3 state. */
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static struct acpi_cx_stats cpu_cx_stats[MAX_CX_STATES];
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/* Values for sysctl. */
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static uint32_t cpu_current_state;
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static uint32_t cpu_performance_state;
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static uint32_t cpu_economy_state;
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static uint32_t cpu_max_state;
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static int cpu_cx_lowest;
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static char cpu_cx_supported[64];
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static device_t *cpu_devices;
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static int cpu_ndevices;
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static struct acpi_cpu_softc *cpu_softc[MAXCPU];
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static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
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static struct sysctl_oid *acpi_cpu_sysctl_tree;
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static int acpi_cpu_probe(device_t dev);
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static int acpi_cpu_attach(device_t dev);
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static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc);
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static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
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static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
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static void acpi_cpu_startup(void *arg);
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static void acpi_cpu_startup_throttling(void);
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static void acpi_cpu_throttle_set(uint32_t speed);
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static void acpi_cpu_idle(void);
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static void acpi_cpu_c1(void);
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static void acpi_pm_ticksub(uint32_t *end, const uint32_t *start);
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static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
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static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
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static void acpi_cpu_power_profile(void *arg);
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static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS);
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static int acpi_cpu_history_sysctl(SYSCTL_HANDLER_ARGS);
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static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
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static device_method_t acpi_cpu_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, acpi_cpu_probe),
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DEVMETHOD(device_attach, acpi_cpu_attach),
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{0, 0}
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};
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static driver_t acpi_cpu_driver = {
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"acpi_cpu",
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acpi_cpu_methods,
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sizeof(struct acpi_cpu_softc),
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};
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static devclass_t acpi_cpu_devclass;
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DRIVER_MODULE(acpi_cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
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static int
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acpi_cpu_probe(device_t dev)
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{
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if (!acpi_disabled("cpu") && acpi_get_type(dev) == ACPI_TYPE_PROCESSOR) {
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device_set_desc(dev, "CPU");
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return (0);
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}
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return (ENXIO);
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}
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static int
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acpi_cpu_attach(device_t dev)
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{
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struct acpi_cpu_softc *sc;
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struct acpi_softc *acpi_sc;
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ACPI_OBJECT pobj;
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ACPI_BUFFER buf;
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ACPI_STATUS status;
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int thr_ret, cx_ret, cpu_id;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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ACPI_ASSERTLOCK;
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sc = device_get_softc(dev);
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sc->cpu_dev = dev;
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sc->cpu_handle = acpi_get_handle(dev);
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/* Get our Processor object. */
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buf.Pointer = &pobj;
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buf.Length = sizeof(pobj);
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status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "Couldn't get Processor object - %s\n",
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AcpiFormatException(status));
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return_VALUE (ENXIO);
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}
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if (pobj.Type != ACPI_TYPE_PROCESSOR) {
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device_printf(dev, "Processor object has bad type %d\n", pobj.Type);
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return_VALUE (ENXIO);
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}
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cpu_id = 0;
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#ifdef SMP
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/*
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* Search all processors for one that matches our ACPI id. This id
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* is set in MD code early in the boot process from the MADT. If
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* UP or there is only one installed processor and the ACPI id has
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* not yet been set, set the id ourselves.
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*/
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cpu_id = pobj.Processor.ProcId;
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if (cpu_id > MAXCPU - 1) {
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device_printf(dev, "CPU id %d too large\n", cpu_id);
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return (ENXIO);
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}
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if (mp_ncpus > 1) {
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struct pcpu *pcpu_data;
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int i;
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for (i = 0; i < MAXCPU; i++) {
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if (CPU_ABSENT(i))
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continue;
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pcpu_data = pcpu_find(i);
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KASSERT(pcpu_data != NULL, ("No pcpu data for %d", i));
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if (pcpu_data->pc_acpi_id == cpu_id)
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break;
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}
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if (i == MAXCPU) {
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device_printf(dev, "Couldn't find CPU for id %d\n", cpu_id);
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return (ENXIO);
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}
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} else
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#endif /* SMP */
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if (PCPU_GET(acpi_id) == 0xffffffff)
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PCPU_SET(acpi_id, cpu_id);
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/*
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* Check if we already probed this processor. We scan the bus twice
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* so it's possible we've already seen this one.
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*/
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if (cpu_softc[cpu_id] != NULL)
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return (ENXIO);
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cpu_softc[cpu_id] = sc;
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sc->cpu_id = cpu_id;
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/*
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* XXX Temporarily call any _INI function under the processor.
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* ACPI-CA will do this after Nov. 2003. The spec doesn't
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* suggest processors have _INI methods but my Thinkpad T23 does.
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*/
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AcpiEvaluateObject(sc->cpu_handle, "_INI", NULL, NULL);
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/* Get various global values from the Processor object. */
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cpu_p_blk = pobj.Processor.PblkAddress;
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cpu_p_blk_len = pobj.Processor.PblkLength;
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ACPI_DEBUG_PRINT((ACPI_DB_IO, "acpi_cpu%d: P_BLK at %#x/%d%s\n",
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device_get_unit(dev), cpu_p_blk, cpu_p_blk_len,
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sc->cpu_p_cnt ? "" : " (shadowed)"));
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acpi_sc = acpi_device_get_parent_softc(dev);
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sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
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acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
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SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree),
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OID_AUTO, "cpu", CTLFLAG_RD, 0, "");
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/* If this is the first device probed, check for quirks. */
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if (device_get_unit(dev) == 0)
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acpi_cpu_quirks(sc);
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/*
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* Probe for throttling and Cx state support.
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* If none of these is present, free up unused resources.
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*/
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thr_ret = acpi_cpu_throttle_probe(sc);
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cx_ret = acpi_cpu_cx_probe(sc);
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if (thr_ret == 0 || cx_ret == 0) {
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status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
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acpi_cpu_notify, sc);
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AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, sc);
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} else {
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sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
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}
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return_VALUE (0);
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}
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static int
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acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc)
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{
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uint32_t duty_end;
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ACPI_BUFFER buf;
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ACPI_OBJECT obj;
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ACPI_GENERIC_ADDRESS gas;
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ACPI_STATUS status;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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ACPI_ASSERTLOCK;
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/* Get throttling parameters from the FADT. 0 means not supported. */
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cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
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cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt;
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cpu_duty_offset = AcpiGbl_FADT->DutyOffset;
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cpu_duty_width = AcpiGbl_FADT->DutyWidth;
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if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
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return (ENXIO);
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/* Validate the duty offset/width. */
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duty_end = cpu_duty_offset + cpu_duty_width - 1;
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if (duty_end > 31) {
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device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n");
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return (ENXIO);
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}
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if (cpu_duty_offset <= 4 && duty_end >= 4) {
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device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n");
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return (ENXIO);
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}
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/*
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* If not present, fall back to using the processor's P_BLK to find
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* the P_CNT register.
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*
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* Note that some systems seem to duplicate the P_BLK pointer
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* across multiple CPUs, so not getting the resource is not fatal.
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*/
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buf.Pointer = &obj;
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buf.Length = sizeof(obj);
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status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
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if (ACPI_SUCCESS(status)) {
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if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
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device_printf(sc->cpu_dev, "_PTC buffer too small\n");
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return (ENXIO);
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}
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memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
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sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
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if (sc->cpu_p_cnt != NULL) {
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ACPI_DEBUG_PRINT((ACPI_DB_IO, "acpi_cpu%d: P_CNT from _PTC\n",
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device_get_unit(sc->cpu_dev)));
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}
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}
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/* If _PTC not present or other failure, try the P_BLK. */
|
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if (sc->cpu_p_cnt == NULL) {
|
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/* The spec says P_BLK must be at least 6 bytes long. */
|
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if (cpu_p_blk_len != 6)
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return (ENXIO);
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gas.Address = cpu_p_blk;
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gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
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gas.RegisterBitWidth = 32;
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sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
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if (sc->cpu_p_cnt != NULL) {
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ACPI_DEBUG_PRINT((ACPI_DB_IO, "acpi_cpu%d: P_CNT from P_BLK\n",
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device_get_unit(sc->cpu_dev)));
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} else {
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device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n");
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return (ENXIO);
|
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}
|
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}
|
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cpu_rid++;
|
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SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
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SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
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OID_AUTO, "max_speed", CTLFLAG_RD,
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&cpu_max_state, 0, "maximum CPU speed");
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SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
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SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
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OID_AUTO, "current_speed", CTLFLAG_RD,
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&cpu_current_state, 0, "current CPU speed");
|
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SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
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SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
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OID_AUTO, "performance_speed",
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CTLTYPE_INT | CTLFLAG_RW, &cpu_performance_state,
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0, acpi_cpu_throttle_sysctl, "I", "");
|
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SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
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SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
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OID_AUTO, "economy_speed",
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CTLTYPE_INT | CTLFLAG_RW, &cpu_economy_state,
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0, acpi_cpu_throttle_sysctl, "I", "");
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|
|
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return (0);
|
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}
|
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|
|
static int
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acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
|
|
{
|
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ACPI_GENERIC_ADDRESS gas;
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struct acpi_cx *cx_ptr;
|
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struct sbuf sb;
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int i, error;
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|
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/* Bus mastering arbitration control is needed for C3. */
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if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
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cpu_quirks |= CPU_QUIRK_NO_C3;
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if (bootverbose)
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device_printf(sc->cpu_dev, "No BM control, C3 disabled.\n");
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}
|
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|
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/*
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* First, check for the ACPI 2.0 _CST sleep states object.
|
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* If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
|
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*/
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cpu_cx_count = 0;
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error = acpi_cpu_cx_cst(sc);
|
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if (error != 0) {
|
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if (cpu_p_blk_len != 6)
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return (ENXIO);
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cx_ptr = sc->cpu_cx_states;
|
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|
|
/* C1 has been required since just after ACPI 1.0 */
|
|
cx_ptr->type = ACPI_STATE_C1;
|
|
cx_ptr->trans_lat = 0;
|
|
cpu_non_c3 = 0;
|
|
cx_ptr++;
|
|
cpu_cx_count++;
|
|
|
|
/* Validate and allocate resources for C2 (P_LVL2). */
|
|
gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
|
|
gas.RegisterBitWidth = 8;
|
|
if (AcpiGbl_FADT->Plvl2Lat < 100) {
|
|
gas.Address = cpu_p_blk + 4;
|
|
cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
cpu_rid++;
|
|
cx_ptr->type = ACPI_STATE_C2;
|
|
cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
|
|
cpu_non_c3 = 1;
|
|
cx_ptr++;
|
|
cpu_cx_count++;
|
|
}
|
|
}
|
|
|
|
/* Validate and allocate resources for C3 (P_LVL3). */
|
|
if (AcpiGbl_FADT->Plvl3Lat < 1000 &&
|
|
(cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
|
|
|
|
gas.Address = cpu_p_blk + 5;
|
|
cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
cpu_rid++;
|
|
cx_ptr->type = ACPI_STATE_C3;
|
|
cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
|
|
cx_ptr++;
|
|
cpu_cx_count++;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* If no valid registers were found, don't attach. */
|
|
if (cpu_cx_count == 0)
|
|
return (ENXIO);
|
|
|
|
sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
|
|
for (i = 0; i < cpu_cx_count; i++) {
|
|
sbuf_printf(&sb, "C%d/%d ", sc->cpu_cx_states[i].type,
|
|
sc->cpu_cx_states[i].trans_lat);
|
|
}
|
|
sbuf_trim(&sb);
|
|
sbuf_finish(&sb);
|
|
SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
|
|
SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
|
|
OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
|
|
0, "Cx/microsecond values for supported Cx states");
|
|
SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
|
|
SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
|
|
OID_AUTO, "cx_lowest", CTLTYPE_INT | CTLFLAG_RW,
|
|
NULL, 0, acpi_cpu_cx_lowest_sysctl, "I",
|
|
"lowest Cx sleep state to use");
|
|
SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
|
|
SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
|
|
OID_AUTO, "cx_history", CTLTYPE_STRING | CTLFLAG_RD,
|
|
NULL, 0, acpi_cpu_history_sysctl, "A", "");
|
|
|
|
/* Set next sleep state and hook the idle function. */
|
|
cpu_cx_next = cpu_cx_lowest;
|
|
cpu_idle_hook = acpi_cpu_idle;
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Parse a _CST package and set up its Cx states. Since the _CST object
|
|
* can change dynamically, our notify handler may call this function
|
|
* to clean up and probe the new _CST package.
|
|
*/
|
|
static int
|
|
acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
|
|
{
|
|
struct acpi_cx *cx_ptr;
|
|
ACPI_STATUS status;
|
|
ACPI_BUFFER buf;
|
|
ACPI_OBJECT *top;
|
|
ACPI_OBJECT *pkg;
|
|
uint32_t count;
|
|
int i;
|
|
|
|
buf.Pointer = NULL;
|
|
buf.Length = ACPI_ALLOCATE_BUFFER;
|
|
status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
|
|
if (ACPI_FAILURE(status))
|
|
return (ENXIO);
|
|
|
|
/* _CST is a package with a count and at least one Cx package. */
|
|
top = (ACPI_OBJECT *)buf.Pointer;
|
|
if (!ACPI_PKG_VALID(top, 2)) {
|
|
device_printf(sc->cpu_dev, "Invalid _CST package\n");
|
|
AcpiOsFree(buf.Pointer);
|
|
return (ENXIO);
|
|
}
|
|
acpi_PkgInt32(sc->cpu_dev, top, 0, &count);
|
|
if (count != top->Package.Count - 1) {
|
|
device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
|
|
count, top->Package.Count - 1);
|
|
count = top->Package.Count - 1;
|
|
}
|
|
if (count > MAX_CX_STATES) {
|
|
device_printf(sc->cpu_dev, "_CST has too many states (%d)\n",
|
|
count);
|
|
count = MAX_CX_STATES;
|
|
}
|
|
|
|
/* Set up all valid states. */
|
|
cpu_cx_count = 0;
|
|
cx_ptr = sc->cpu_cx_states;
|
|
for (i = 0; i < count; i++) {
|
|
pkg = &top->Package.Elements[i + 1];
|
|
if (!ACPI_PKG_VALID(pkg, 4)) {
|
|
device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
|
|
continue;
|
|
}
|
|
|
|
/* Cx type, transition latency, power consumed. */
|
|
acpi_PkgInt32(sc->cpu_dev, pkg, 1, &cx_ptr->type);
|
|
acpi_PkgInt32(sc->cpu_dev, pkg, 2, &cx_ptr->trans_lat);
|
|
acpi_PkgInt32(sc->cpu_dev, pkg, 3, &cx_ptr->power);
|
|
|
|
/* Validate the state to see if we should use it. */
|
|
switch (cx_ptr->type) {
|
|
case ACPI_STATE_C1:
|
|
cpu_non_c3 = i;
|
|
cx_ptr++;
|
|
cpu_cx_count++;
|
|
continue;
|
|
case ACPI_STATE_C2:
|
|
if (cx_ptr->trans_lat > 100) {
|
|
device_printf(sc->cpu_dev, "C2[%d] not available.\n", i);
|
|
continue;
|
|
}
|
|
cpu_non_c3 = i;
|
|
break;
|
|
case ACPI_STATE_C3:
|
|
default:
|
|
if (cx_ptr->trans_lat > 1000 ||
|
|
(cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
|
|
|
|
device_printf(sc->cpu_dev, "C3[%d] not available.\n", i);
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
|
|
#ifdef notyet
|
|
/* Free up any previous register. */
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
|
|
cx_ptr->p_lvlx = NULL;
|
|
}
|
|
#endif
|
|
|
|
/* Allocate the control register for C2 or C3. */
|
|
acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx);
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
cpu_rid++;
|
|
device_printf(sc->cpu_dev, "C%d state %d lat\n", cx_ptr->type,
|
|
cx_ptr->trans_lat);
|
|
cx_ptr++;
|
|
cpu_cx_count++;
|
|
}
|
|
}
|
|
AcpiOsFree(buf.Pointer);
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Call this *after* all CPUs have been attached.
|
|
*
|
|
* Takes the ACPI lock to avoid fighting anyone over the SMI command
|
|
* port. Could probably lock less code.
|
|
*/
|
|
static void
|
|
acpi_cpu_startup(void *arg)
|
|
{
|
|
struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)arg;
|
|
ACPI_LOCK_DECL;
|
|
|
|
ACPI_LOCK;
|
|
|
|
/* Get set of CPU devices */
|
|
devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
|
|
|
|
/* Register performance profile change handler */
|
|
EVENTHANDLER_REGISTER(power_profile_change, acpi_cpu_power_profile,
|
|
NULL, 0);
|
|
|
|
if (sc->cpu_p_cnt != NULL)
|
|
acpi_cpu_startup_throttling();
|
|
else
|
|
ACPI_UNLOCK;
|
|
}
|
|
|
|
static void
|
|
acpi_cpu_startup_throttling()
|
|
{
|
|
int cpu_temp_speed;
|
|
|
|
/* Initialise throttling states */
|
|
cpu_max_state = CPU_MAX_SPEED;
|
|
cpu_performance_state = cpu_max_state;
|
|
cpu_economy_state = cpu_performance_state / 2;
|
|
|
|
/* 0 is 'reserved' */
|
|
if (cpu_economy_state == 0)
|
|
cpu_economy_state++;
|
|
if (TUNABLE_INT_FETCH("hw.acpi.cpu.performance_speed", &cpu_temp_speed) &&
|
|
cpu_temp_speed > 0 && cpu_temp_speed <= cpu_max_state) {
|
|
|
|
cpu_performance_state = cpu_temp_speed;
|
|
}
|
|
if (TUNABLE_INT_FETCH("hw.acpi.cpu.economy_speed", &cpu_temp_speed) &&
|
|
cpu_temp_speed > 0 && cpu_temp_speed <= cpu_max_state) {
|
|
|
|
cpu_economy_state = cpu_temp_speed;
|
|
}
|
|
|
|
/* If ACPI 2.0+, signal platform that we are taking over throttling. */
|
|
if (cpu_pstate_cnt != 0)
|
|
AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8);
|
|
|
|
ACPI_UNLOCK;
|
|
|
|
/* Set initial speed */
|
|
acpi_cpu_power_profile(NULL);
|
|
|
|
printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), "
|
|
"currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1),
|
|
CPU_SPEED_PRINTABLE(cpu_current_state));
|
|
}
|
|
|
|
/*
|
|
* Set CPUs to the new state.
|
|
*
|
|
* Must be called with the ACPI lock held.
|
|
*/
|
|
static void
|
|
acpi_cpu_throttle_set(uint32_t speed)
|
|
{
|
|
struct acpi_cpu_softc *sc;
|
|
int i;
|
|
uint32_t p_cnt, clk_val;
|
|
|
|
ACPI_ASSERTLOCK;
|
|
|
|
/* Iterate over processors */
|
|
for (i = 0; i < cpu_ndevices; i++) {
|
|
sc = device_get_softc(cpu_devices[i]);
|
|
if (sc->cpu_p_cnt == NULL)
|
|
continue;
|
|
|
|
/* Get the current P_CNT value and disable throttling */
|
|
p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4);
|
|
p_cnt &= ~CPU_P_CNT_THT_EN;
|
|
CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
|
|
|
|
/* If we're at maximum speed, that's all */
|
|
if (speed < CPU_MAX_SPEED) {
|
|
/* Mask the old CLK_VAL off and or-in the new value */
|
|
clk_val = CPU_MAX_SPEED << cpu_duty_offset;
|
|
p_cnt &= ~clk_val;
|
|
p_cnt |= (speed << cpu_duty_offset);
|
|
|
|
/* Write the new P_CNT value and then enable throttling */
|
|
CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
|
|
p_cnt |= CPU_P_CNT_THT_EN;
|
|
CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
|
|
}
|
|
ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev),
|
|
"set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed));
|
|
}
|
|
cpu_current_state = speed;
|
|
}
|
|
|
|
/*
|
|
* Idle the CPU in the lowest state possible.
|
|
* This function is called with interrupts disabled.
|
|
*/
|
|
static void
|
|
acpi_cpu_idle()
|
|
{
|
|
int bm_active, i, asleep;
|
|
struct acpi_cx *cx_next;
|
|
struct acpi_cpu_softc *sc;
|
|
uint32_t start_time, end_time;
|
|
|
|
/* Look up our CPU id and to get our softc. */
|
|
sc = cpu_softc[PCPU_GET(acpi_id)];
|
|
KASSERT(sc != NULL, ("NULL softc for %d", PCPU_GET(acpi_id)));
|
|
|
|
/* If disabled, return immediately. */
|
|
if (cpu_cx_lowest < 0 || cpu_cx_count == 0) {
|
|
ACPI_ENABLE_IRQS();
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Check for bus master activity. If there was activity, clear
|
|
* the bit and use the lowest non-C3 state. Note that the USB
|
|
* driver polling for new devices keeps this bit set all the
|
|
* time if USB is enabled.
|
|
*/
|
|
AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
|
|
ACPI_MTX_DO_NOT_LOCK);
|
|
if (bm_active != 0) {
|
|
AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
|
|
ACPI_MTX_DO_NOT_LOCK);
|
|
cpu_cx_next = min(cpu_cx_next, cpu_non_c3);
|
|
}
|
|
|
|
/* Perform the actual sleep based on the Cx-specific semantics. */
|
|
cx_next = &sc->cpu_cx_states[cpu_cx_next];
|
|
switch (cx_next->type) {
|
|
case ACPI_STATE_C1:
|
|
/* Execute HLT (or equivalent) and wait for an interrupt. */
|
|
acpi_cpu_c1();
|
|
|
|
/*
|
|
* We can't calculate the time spent in C1 since the place we
|
|
* wake up is an ISR. Use a constant time of 1 ms.
|
|
*/
|
|
start_time = 0;
|
|
end_time = 1000;
|
|
break;
|
|
case ACPI_STATE_C2:
|
|
/*
|
|
* Read from P_LVLx to enter C2, checking time spent asleep.
|
|
* Use the ACPI timer for measuring sleep time. Since we need to
|
|
* get the time very close to the CPU start/stop clock logic, this
|
|
* is the only reliable time source.
|
|
*/
|
|
AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
CPU_GET_REG(cx_next->p_lvlx, 1);
|
|
|
|
/*
|
|
* Read the end time twice. Since it may take an arbitrary time
|
|
* to enter the idle state, the first read may be executed before
|
|
* the processor has stopped. Doing it again provides enough
|
|
* margin that we are certain to have a correct value.
|
|
*/
|
|
AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
ACPI_ENABLE_IRQS();
|
|
break;
|
|
case ACPI_STATE_C3:
|
|
default:
|
|
/* Disable bus master arbitration and enable bus master wakeup. */
|
|
AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
|
|
AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK);
|
|
|
|
/* Read from P_LVLx to enter C3, checking time spent asleep. */
|
|
AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
CPU_GET_REG(cx_next->p_lvlx, 1);
|
|
|
|
/* Read the end time twice. See comment for C2 above. */
|
|
AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
|
|
/* Enable bus master arbitration and disable bus master wakeup. */
|
|
AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
|
|
AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
|
|
ACPI_ENABLE_IRQS();
|
|
break;
|
|
}
|
|
|
|
/* Find the actual time asleep in microseconds, minus overhead. */
|
|
acpi_pm_ticksub(&end_time, &start_time);
|
|
asleep = PM_USEC(end_time) - cx_next->trans_lat;
|
|
|
|
/* Record statistics */
|
|
if (asleep < cx_next->trans_lat)
|
|
cpu_cx_stats[cpu_cx_next].short_slp++;
|
|
else
|
|
cpu_cx_stats[cpu_cx_next].long_slp++;
|
|
|
|
/*
|
|
* If we slept 100 us or more, use the lowest Cx state.
|
|
* Otherwise, find the lowest state that has a latency less than
|
|
* or equal to the length of our last sleep.
|
|
*/
|
|
if (asleep >= 100)
|
|
cpu_cx_next = cpu_cx_lowest;
|
|
else {
|
|
for (i = cpu_cx_lowest; i >= 0; i--) {
|
|
if (sc->cpu_cx_states[i].trans_lat <= asleep) {
|
|
cpu_cx_next = i;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Put the CPU in C1 in a machine-dependant way. */
|
|
static void
|
|
acpi_cpu_c1()
|
|
{
|
|
#ifdef __ia64__
|
|
ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
|
|
#else
|
|
__asm __volatile("sti; hlt");
|
|
#endif
|
|
}
|
|
|
|
/* Find the difference between two PM tick counts. */
|
|
static void
|
|
acpi_pm_ticksub(uint32_t *end, const uint32_t *start)
|
|
{
|
|
if (*end >= *start)
|
|
*end = *end - *start;
|
|
else if (AcpiGbl_FADT->TmrValExt == 0)
|
|
*end = (((0x00FFFFFF - *start) + *end + 1) & 0x00FFFFFF);
|
|
else
|
|
*end = ((0xFFFFFFFF - *start) + *end + 1);
|
|
}
|
|
|
|
/*
|
|
* Re-evaluate the _PSS and _CST objects when we are notified that they
|
|
* have changed.
|
|
* XXX Re-evaluation disabled until locking is done.
|
|
*/
|
|
static void
|
|
acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
|
|
{
|
|
struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
|
|
|
|
switch (notify) {
|
|
case ACPI_CPU_NOTIFY_PERF_STATES:
|
|
device_printf(sc->cpu_dev, "Performance states changed\n");
|
|
/* acpi_cpu_px_available(sc); */
|
|
break;
|
|
case ACPI_CPU_NOTIFY_CX_STATES:
|
|
device_printf(sc->cpu_dev, "Cx states changed\n");
|
|
/* acpi_cpu_cx_cst(sc); */
|
|
break;
|
|
default:
|
|
device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int
|
|
acpi_cpu_quirks(struct acpi_cpu_softc *sc)
|
|
{
|
|
|
|
#ifdef SMP
|
|
/*
|
|
* C3 is not supported on multiple CPUs since this would require
|
|
* flushing all caches which is currently too expensive.
|
|
*/
|
|
if (mp_ncpus > 1)
|
|
cpu_quirks |= CPU_QUIRK_NO_C3;
|
|
#endif
|
|
|
|
#ifdef notyet
|
|
/* Look for various quirks of the PIIX4 part. */
|
|
acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
|
|
if (acpi_dev != NULL) {
|
|
switch (pci_get_revid(acpi_dev)) {
|
|
/*
|
|
* Disable throttling control on PIIX4 A and B-step.
|
|
* See specification changes #13 ("Manual Throttle Duty Cycle")
|
|
* and #14 ("Enabling and Disabling Manual Throttle"), plus
|
|
* erratum #5 ("STPCLK# Deassertion Time") from the January
|
|
* 2002 PIIX4 specification update. Note that few (if any)
|
|
* mobile systems ever used this part.
|
|
*/
|
|
case PCI_REVISION_A_STEP:
|
|
case PCI_REVISION_B_STEP:
|
|
cpu_quirks |= CPU_QUIRK_NO_THROTTLE;
|
|
/* FALLTHROUGH */
|
|
/*
|
|
* Disable C3 support for all PIIX4 chipsets. Some of these parts
|
|
* do not report the BMIDE status to the BM status register and
|
|
* others have a livelock bug if Type-F DMA is enabled. Linux
|
|
* works around the BMIDE bug by reading the BM status directly
|
|
* but we take the simpler approach of disabling C3 for these
|
|
* parts.
|
|
*
|
|
* See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
|
|
* Livelock") from the January 2002 PIIX4 specification update.
|
|
* Applies to all PIIX4 models.
|
|
*/
|
|
case PCI_REVISION_4E:
|
|
case PCI_REVISION_4M:
|
|
cpu_quirks |= CPU_QUIRK_NO_C3;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Power profile change hook.
|
|
*
|
|
* Uses the ACPI lock to avoid reentrancy.
|
|
*/
|
|
static void
|
|
acpi_cpu_power_profile(void *arg)
|
|
{
|
|
int state;
|
|
uint32_t new;
|
|
ACPI_LOCK_DECL;
|
|
|
|
state = power_profile_get_state();
|
|
if (state != POWER_PROFILE_PERFORMANCE && state != POWER_PROFILE_ECONOMY)
|
|
return;
|
|
|
|
ACPI_LOCK;
|
|
|
|
switch (state) {
|
|
case POWER_PROFILE_PERFORMANCE:
|
|
new = cpu_performance_state;
|
|
break;
|
|
case POWER_PROFILE_ECONOMY:
|
|
new = cpu_economy_state;
|
|
break;
|
|
default:
|
|
new = cpu_current_state;
|
|
break;
|
|
}
|
|
|
|
if (cpu_current_state != new)
|
|
acpi_cpu_throttle_set(new);
|
|
|
|
ACPI_UNLOCK;
|
|
}
|
|
|
|
/*
|
|
* Handle changes in the performance/ecomony CPU settings.
|
|
*
|
|
* Does not need the ACPI lock (although setting *argp should
|
|
* probably be atomic).
|
|
*/
|
|
static int
|
|
acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
uint32_t *argp;
|
|
uint32_t arg;
|
|
int error;
|
|
|
|
argp = (uint32_t *)oidp->oid_arg1;
|
|
arg = *argp;
|
|
error = sysctl_handle_int(oidp, &arg, 0, req);
|
|
|
|
/* Error or no new value */
|
|
if (error != 0 || req->newptr == NULL)
|
|
return (error);
|
|
if (arg < 1 || arg > cpu_max_state)
|
|
return (EINVAL);
|
|
|
|
/* Set new value and possibly switch */
|
|
*argp = arg;
|
|
acpi_cpu_power_profile(NULL);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
acpi_cpu_history_sysctl(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
struct sbuf sb;
|
|
char buf[128];
|
|
int i;
|
|
|
|
sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
|
|
for (i = 0; i < cpu_cx_count; i++) {
|
|
sbuf_printf(&sb, "%u/%u ", cpu_cx_stats[i].long_slp,
|
|
cpu_cx_stats[i].short_slp);
|
|
}
|
|
sbuf_trim(&sb);
|
|
sbuf_finish(&sb);
|
|
sysctl_handle_string(oidp, sbuf_data(&sb), 0, req);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
struct acpi_cpu_softc *sc;
|
|
int val, error, i;
|
|
|
|
sc = device_get_softc(cpu_devices[0]);
|
|
val = cpu_cx_lowest;
|
|
error = sysctl_handle_int(oidp, &val, 0, req);
|
|
if (error != 0 || req->newptr == NULL)
|
|
return (error);
|
|
if (val < -1 || val > cpu_cx_count - 1)
|
|
return (EINVAL);
|
|
|
|
/* Use the new value for the next idle slice. */
|
|
cpu_cx_lowest = val;
|
|
cpu_cx_next = val;
|
|
|
|
/* If not disabling, cache the new lowest non-C3 state. */
|
|
cpu_non_c3 = 0;
|
|
for (i = cpu_cx_lowest; i >= 0; i--) {
|
|
if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
|
|
cpu_non_c3 = i;
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Reset the statistics counters. */
|
|
memset(cpu_cx_stats, 0, sizeof(cpu_cx_stats));
|
|
|
|
return (0);
|
|
}
|