932fb6dd65
commit 6d3c4c09226ad6bdd662e3e52489ef294a6ce298 Add terasic_mtl vt(4) framebuffer driver terasic_mtl can be built with syscons(4) and vt(4) attachments, selected at compile time. commit 33240259b47a7c990a5a88a19f133a5600432a4c Clear terasic_mtl text buffer on attach commit d188c2d2412953f949624aa35cd07082830943c9 Update terasic vt(4) driver for FreeBSD r269783 commit d1cc54eee852fa4fc9d359d5bb2171d24ec73369 Safety belt to ensure vt(4) fb parameters are correct commit 76e6d468ef45711d7952786095fc4791289ebb4b Improve terasic_mtl_vt fdt parsing - Use OF_getencprop to avoid need for explicit endian handling (submitted by ray@freebsd.org) - Check for expected length and correct pointer type commit 3e2524b8995ab66e8a9295e4c87cbc7126eeddf4 Correct device_printf usage commit 9e53e3c8e0766414e25662c95b09cc51c92443b0 Switch framebuffer to match host endianness Xorg and xf86-video-scfb work much better with a native-endian framebuffer. commit 0f49259d596321ed85288ac0e1fb4ee1c966df48 Switch DE4 to vt(4) and enable kbdmux commit 5bc96ebc89db7d134ad478335090c8477c1677c7 Add missing \n in device_printf calls Submitted by: emaste Sponsored by: DARPA, AFRL
234 lines
7.5 KiB
C
234 lines
7.5 KiB
C
/*-
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* Copyright (c) 2012 Robert N. M. Watson
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_TERASIC_MTL_H_
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#define _DEV_TERASIC_MTL_H_
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#include "opt_syscons.h"
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struct terasic_mtl_softc {
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#if defined(DEV_SC)
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/*
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* syscons requires that its video_adapter_t be at the front of the
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* softc, so place syscons fields first, which we otherwise would
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* probably not do.
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*/
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video_adapter_t mtl_va;
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#endif
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/*
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* Bus-related fields.
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*/
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device_t mtl_dev;
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int mtl_unit;
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/*
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* The MTL driver doesn't require a lot of synchronisation; however,
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* the lock is used to protect read-modify-write operations on MTL
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* registers.
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*/
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struct mtx mtl_lock;
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/*
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* Control register device -- mappable from userspace.
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*/
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struct cdev *mtl_reg_cdev;
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struct resource *mtl_reg_res;
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int mtl_reg_rid;
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/*
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* Graphics frame buffer device -- mappable from userspace, and used
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* by the vt framebuffer interface.
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*/
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struct cdev *mtl_pixel_cdev;
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struct resource *mtl_pixel_res;
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int mtl_pixel_rid;
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/*
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* Text frame buffer device -- mappable from userspace, and syscons
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* hookup.
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*/
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struct cdev *mtl_text_cdev;
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struct resource *mtl_text_res;
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int mtl_text_rid;
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uint16_t *mtl_text_soft;
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/*
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* Framebuffer hookup for vt(4).
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*/
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struct fb_info mtl_fb_info;
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};
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#define TERASIC_MTL_LOCK(sc) mtx_lock(&(sc)->mtl_lock)
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#define TERASIC_MTL_LOCK_ASSERT(sc) mtx_assert(&(sc)->mtl_lock, MA_OWNED)
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#define TERASIC_MTL_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtl_lock)
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#define TERASIC_MTL_LOCK_INIT(sc) mtx_init(&(sc)->mtl_lock, \
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"terasic_mtl", NULL, MTX_DEF)
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#define TERASIC_MTL_UNLOCK(sc) mtx_unlock(&(sc)->mtl_lock)
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/*
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* Constant properties of the MTL text frame buffer.
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*/
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#define TERASIC_MTL_COLS 100
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#define TERASIC_MTL_ROWS 40
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/*
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* MTL control register offsets.
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*/
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#define TERASIC_MTL_OFF_BLEND 0
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#define TERASIC_MTL_OFF_TEXTCURSOR 4
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#define TERASIC_MTL_OFF_TEXTFRAMEBUFADDR 8
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#define TERASIC_MTL_OFF_TOUCHPOINT_X1 12
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#define TERASIC_MTL_OFF_TOUCHPOINT_Y1 16
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#define TERASIC_MTL_OFF_TOUCHPOINT_X2 20
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#define TERASIC_MTL_OFF_TOUCHPOINT_Y2 24
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#define TERASIC_MTL_OFF_TOUCHGESTURE 28
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/*
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* Constants to help interpret various control registers.
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*/
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#define TERASIC_MTL_BLEND_PIXEL_ENDIAN_SWAP 0x10000000
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#define TERASIC_MTL_BLEND_DEFAULT_MASK 0x0f000000
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#define TERASIC_MTL_BLEND_DEFAULT_SHIFT 24
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#define TERASIC_MTL_BLEND_PIXEL_MASK 0x00ff0000
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#define TERASIC_MTL_BLEND_PIXEL_SHIFT 16
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#define TERASIC_MTL_BLEND_TEXTFG_MASK 0x0000ff00
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#define TERASIC_MTL_BLEND_TEXTFG_SHIFT 8
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#define TERASIC_MTL_BLEND_TEXTBG_MASK 0x000000ff
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#define TERASIC_MTL_BLEND_TEXTBG_SHIFT 0
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#define TERASIC_MTL_TEXTCURSOR_COL_MASK 0xff00
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#define TERASIC_MTL_TEXTCURSOR_COL_SHIFT 8
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#define TERASIC_MTL_TEXTCURSOR_ROW_MASK 0xff
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/*
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* Colours used both by VGA-like text rendering, and for the default display
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* colour.
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*/
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#define TERASIC_MTL_COLOR_BLACK 0
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#define TERASIC_MTL_COLOR_DARKBLUE 1
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#define TERASIC_MTL_COLOR_DARKGREEN 2
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#define TERASIC_MTL_COLOR_DARKCYAN 3
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#define TERASIC_MTL_COLOR_DARKRED 4
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#define TERASIC_MTL_COLOR_DARKMAGENTA 5
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#define TERASIC_MTL_COLOR_BROWN 6
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#define TERASIC_MTL_COLOR_LIGHTGREY 7
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#define TERASIC_MTL_COLOR_DARKGREY 8
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#define TERASIC_MTL_COLOR_LIGHTBLUE 9
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#define TERASIC_MTL_COLOR_LIGHTGREEN 10
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#define TERASIC_MTL_COLOR_LIGHTCYAN 11
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#define TERASIC_MTL_COLOR_LIGHTRED 12
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#define TERASIC_MTL_COLOR_LIGHTMAGENTA 13
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#define TERASIC_MTL_COLOR_LIGHTYELLOW 14
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#define TERASIC_MTL_COLOR_WHITE 15
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#define TERASIC_MTL_COLORMASK_BLINK 0x80
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/*
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* Constants to help interpret the text frame buffer.
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*/
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#define TERASIC_MTL_TEXTFRAMEBUF_EXPECTED_ADDR 0x0177000
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#define TERASIC_MTL_TEXTFRAMEBUF_CHAR_SHIFT 0
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#define TERASIC_MTL_TEXTFRAMEBUF_ATTR_SHIFT 8
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/*
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* Framebuffer constants.
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*/
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#define TERASIC_MTL_FB_WIDTH 800
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#define TERASIC_MTL_FB_HEIGHT 640
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/*
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* Alpha-blending constants.
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*/
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#define TERASIC_MTL_ALPHA_TRANSPARENT 0
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#define TERASIC_MTL_ALPHA_OPAQUE 255
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/*
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* Driver setup routines from the bus attachment/teardown.
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*/
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int terasic_mtl_attach(struct terasic_mtl_softc *sc);
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void terasic_mtl_detach(struct terasic_mtl_softc *sc);
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extern devclass_t terasic_mtl_devclass;
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/*
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* Sub-driver setup routines.
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*/
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int terasic_mtl_fbd_attach(struct terasic_mtl_softc *sc);
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void terasic_mtl_fbd_detach(struct terasic_mtl_softc *sc);
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int terasic_mtl_pixel_attach(struct terasic_mtl_softc *sc);
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void terasic_mtl_pixel_detach(struct terasic_mtl_softc *sc);
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int terasic_mtl_reg_attach(struct terasic_mtl_softc *sc);
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void terasic_mtl_reg_detach(struct terasic_mtl_softc *sc);
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int terasic_mtl_syscons_attach(struct terasic_mtl_softc *sc);
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void terasic_mtl_syscons_detach(struct terasic_mtl_softc *sc);
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int terasic_mtl_text_attach(struct terasic_mtl_softc *sc);
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void terasic_mtl_text_detach(struct terasic_mtl_softc *sc);
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/*
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* Control register I/O routines.
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*/
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void terasic_mtl_reg_blank(struct terasic_mtl_softc *sc);
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void terasic_mtl_reg_blend_get(struct terasic_mtl_softc *sc,
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uint32_t *blendp);
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void terasic_mtl_reg_blend_set(struct terasic_mtl_softc *sc,
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uint32_t blend);
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void terasic_mtl_reg_textcursor_get(struct terasic_mtl_softc *sc,
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uint8_t *colp, uint8_t *rowp);
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void terasic_mtl_reg_textcursor_set(struct terasic_mtl_softc *sc,
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uint8_t col, uint8_t row);
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void terasic_mtl_reg_textframebufaddr_get(struct terasic_mtl_softc *sc,
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uint32_t *addrp);
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void terasic_mtl_reg_textframebufaddr_set(struct terasic_mtl_softc *sc,
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uint32_t addr);
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/*
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* Read-modify-write updates of sub-bytes of the blend register.
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*/
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void terasic_mtl_blend_default_set(struct terasic_mtl_softc *sc,
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uint8_t colour);
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void terasic_mtl_blend_pixel_set(struct terasic_mtl_softc *sc,
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uint8_t alpha);
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void terasic_mtl_blend_textfg_set(struct terasic_mtl_softc *sc,
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uint8_t alpha);
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void terasic_mtl_blend_textbg_set(struct terasic_mtl_softc *sc,
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uint8_t alpha);
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void terasic_mtl_reg_pixel_endian_set(struct terasic_mtl_softc *sc,
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int endian_swap);
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/*
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* Text frame buffer I/O routines.
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*/
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void terasic_mtl_text_putc(struct terasic_mtl_softc *sc, u_int x, u_int y,
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uint8_t c, uint8_t a);
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#endif /* _DEV_TERASIC_MTL_H_ */
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