774 lines
17 KiB
C
774 lines
17 KiB
C
/*
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* Intel PCIC or compatible Controller driver
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* May be built using LKM to make a loadable module.
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*-------------------------------------------------------------------------
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*
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* Copyright (c) 1995 Andrew McRae. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef LKM
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#define NPCIC 1
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#else
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#include "pcic.h"
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/file.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#include <sys/ioctl.h>
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#include <sys/mount.h>
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#include <sys/sysent.h>
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#include <sys/exec.h>
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#include <sys/lkm.h>
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#include <machine/clock.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/isa_device.h>
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#include <i386/isa/icu.h>
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#include <pccard/i82365.h>
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#include <pccard/card.h>
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#include <pccard/slot.h>
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#include <sys/devconf.h>
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extern struct kern_devconf kdc_pccard0;
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struct kern_devconf kdc_pcic[PCIC_MAX_SLOTS] = {
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{
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0, 0, 0, /* filled in by dev_attach */
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"pcic", 0, { MDDT_BUS, 0 },
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0, 0, 0, BUS_EXTERNALLEN,
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&kdc_pccard0, /* parent is the CPU */
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0, /* no parentdata */
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DC_UNKNOWN,
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"PCMCIA or PCCARD slot",
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DC_CLS_BUS /* class */
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}
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};
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/*
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* Prototypes for interrupt handler.
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*/
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static void pcicintr __P((int unit));
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static int pcic_ioctl __P((struct slot *, int, caddr_t));
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static int pcic_power __P((struct slot *));
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static void pcic_reset __P((struct slot *));
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static void pcic_disable __P((struct slot *));
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static void pcic_mapirq __P((struct slot *, int));
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static void pcictimeout __P((void));
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/*
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* Per-slot data table.
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*/
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static struct pcic_slot
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{
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int slot; /* My slot number */
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int index; /* Index register */
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int data; /* Data register */
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int offset; /* Offset value for index */
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char controller; /* Device type */
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char revision; /* Device Revision */
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struct slot *sp; /* Back ptr to slot */
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} pcic_slots[PCIC_MAX_SLOTS];
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static int pcic_irq;
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static unsigned long pcic_imask;
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static struct slot_cont cinfo;
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static int pcic_memory(struct slot *, int);
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static int pcic_io(struct slot *, int);
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int pcic_probe();
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/*
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* Internal inline functions for accessing the PCIC.
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*/
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/*
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* Read a register from the PCIC.
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*/
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static inline unsigned char
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getb (struct pcic_slot *sp, int reg)
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{
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outb (sp->index, sp->offset + reg);
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return inb (sp->data);
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}
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/*
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* Write a register on the PCIC
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*/
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static inline void
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putb (struct pcic_slot *sp, int reg, unsigned char val)
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{
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outb (sp->index, sp->offset + reg);
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outb (sp->data, val);
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}
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/*
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* Clear bit(s) of a register.
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*/
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static inline void
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clrb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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putb (sp, reg, getb (sp, reg) & ~mask);
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}
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/*
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* Set bit(s) of a register
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*/
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static inline void
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setb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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putb (sp, reg, getb (sp, reg) | mask);
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}
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/*
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* Write a 16 bit value to 2 adjacent PCIC registers
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*/
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static inline void
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putw (struct pcic_slot *sp, int reg, unsigned short word)
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{
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putb (sp, reg, word & 0xFF);
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putb (sp, reg + 1, (word >> 8) & 0xff);
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}
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/*
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* Loadable kernel module interface.
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*/
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#ifdef LKM
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/*
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* This defines the lkm_misc module use by modload
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* to define the module name.
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*/
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MOD_MISC( "pcic")
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static int pcic_unload();
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/*
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* Module handler that processes loads and unloads.
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* Once the module is loaded, the probe routine
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* is called to install the slots (if any).
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*/
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static int
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pcic_handle( lkmtp, cmd)
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struct lkm_table *lkmtp;
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int cmd;
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{
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int err = 0; /* default = success*/
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switch( cmd) {
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case LKM_E_LOAD:
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/*
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* Don't load twice! (lkmexists() is exported by kern_lkm.c)
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*/
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if( lkmexists( lkmtp))
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return( EEXIST);
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/*
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* Call the probe routine to find the slots. If
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* no slots exist, then don't bother loading the module.
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*/
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if (pcic_probe() == 0)
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return(ENODEV);
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break; /* Success*/
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/*
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* Attempt to unload the slot driver.
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*/
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case LKM_E_UNLOAD:
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printf("Unloading PCIC driver\n");
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err = pcic_unload();
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break; /* Success*/
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default: /* we only understand load/unload*/
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err = EINVAL;
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break;
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}
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return( err);
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}
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/*
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* External entry point; should generally match name of .o file. The
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* arguments are always the same for all loaded modules. The "load",
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* "unload", and "stat" functions in "DISPATCH" will be called under
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* their respective circumstances unless their value is "nosys". If
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* called, they are called with the same arguments (cmd is included to
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* allow the use of a single function, ver is included for version
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* matching between modules and the kernel loader for the modules).
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*
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* Since we expect to link in the kernel and add external symbols to
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* the kernel symbol name space in a future version, generally all
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* functions used in the implementation of a particular module should
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* be static unless they are expected to be seen in other modules or
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* to resolve unresolved symbols alread existing in the kernel (the
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* second case is not likely to ever occur).
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*
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* The entry point should return 0 unless it is refusing load (in which
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* case it should return an errno from errno.h).
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*/
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int
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pcic_mod(lkmtp, cmd, ver)
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struct lkm_table *lkmtp;
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int cmd;
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int ver;
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{
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DISPATCH(lkmtp,cmd,ver,pcic_handle,pcic_handle,nosys)
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}
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/*
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* pcic_unload - Called when unloading a LKM.
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* Disables interrupts and resets PCIC.
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*/
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static int
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pcic_unload()
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{
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int slot;
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struct pcic_slot *cp = pcic_slots;
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untimeout(pcictimeout,0);
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if (pcic_irq)
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{
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for (slot = 0; slot < PCIC_MAX_SLOTS; slot++, cp++) {
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if (cp->sp)
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putb(cp, PCIC_STAT_INT, 0);
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kdc_pcic[slot].kdc_state = DC_UNCONFIGURED;
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}
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unregister_intr(pcic_irq, pcicintr);
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}
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pccard_remove_controller(&cinfo);
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return(0);
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}
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#endif LKM
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#if 0
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static void
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pcic_dump_attributes (unsigned char *scratch, int maxlen)
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{
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int i,j,k;
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i = 0;
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while (scratch[i] != 0xff && i < maxlen) {
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unsigned char link = scratch[i+2];
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/*
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* Dump attribute memory
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*/
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if (scratch[i])
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{
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printf ("[%02x] ", i);
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for (j = 0; j < 2 * link + 4 && j < 128; j += 2)
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printf ("%02x ", scratch[j + i]);
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printf ("\n");
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}
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i += 4 + 2 * link;
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}
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}
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#endif
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/*
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* entry point from main code to map/unmap memory context.
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*/
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static int
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pcic_memory(struct slot *sp, int win)
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{
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struct pcic_slot *cp = sp->cdata;
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struct mem_desc *mp = &sp->mem[win];
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int reg = mp->window * PCIC_MEMSIZE + PCIC_MEMBASE;
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if (mp->flags & MDF_ACTIVE)
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{
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unsigned long sys_addr = (unsigned long)mp->start >> 12;
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/*
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* Write the addresses, card offsets and length.
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* The values are all stored as the upper 12 bits of the
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* 24 bit address i.e everything is allocated as 4 Kb chunks.
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*/
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putw (cp, reg, sys_addr & 0xFFF);
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putw (cp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
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putw (cp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
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#if 0
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printf("card offs = card_adr = 0x%x 0x%x, sys_addr = 0x%x\n",
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mp->card, ((mp->card >> 12) - sys_addr) & 0x3FFF,
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sys_addr);
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#endif
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/*
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* Each 16 bit register has some flags in the upper bits.
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*/
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if (mp->flags & MDF_16BITS)
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setb(cp, reg+1, PCIC_DATA16);
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if (mp->flags & MDF_ZEROWS)
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setb(cp, reg+1, PCIC_ZEROWS);
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if (mp->flags & MDF_WS0)
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setb(cp, reg+3, PCIC_MW0);
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if (mp->flags & MDF_WS1)
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setb(cp, reg+3, PCIC_MW1);
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if (mp->flags & MDF_ATTR)
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setb(cp, reg+5, PCIC_REG);
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if (mp->flags & MDF_WP)
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setb(cp, reg+5, PCIC_WP);
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#if 0
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printf("Slot number %d, reg 0x%x, offs 0x%x\n",
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cp->slot, reg, cp->offset);
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printf("Map window to sys addr 0x%x for %d bytes, card 0x%x\n",
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mp->start, mp->size, mp->card);
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printf("regs are: 0x%02x%02x 0x%02x%02x 0x%02x%02x flags 0x%x\n",
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getb(cp, reg), getb(cp, reg+1),
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getb(cp, reg+2), getb(cp, reg+3),
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getb(cp, reg+4), getb(cp, reg+5),
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mp->flags);
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#endif
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/*
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* Enable the memory window. By experiment, we need a delay.
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*/
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setb (cp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
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DELAY(50);
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}
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else
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{
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#if 0
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printf("Unmapping window %d\n", win);
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#endif
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clrb (cp, PCIC_ADDRWINE, 1<<win);
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putw (cp, reg, 0);
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putw (cp, reg+2, 0);
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putw (cp, reg+4, 0);
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}
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return(0);
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}
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/*
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* pcic_io - map or unmap I/O context
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*/
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static int
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pcic_io(struct slot *sp, int win)
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{
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int mask, reg;
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struct pcic_slot *cp = sp->cdata;
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struct io_desc *ip = &sp->io[win];
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if (win)
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{
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mask = PCIC_IO0_EN;
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reg = PCIC_IO0;
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}
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else
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{
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mask = PCIC_IO1_EN;
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reg = PCIC_IO1;
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}
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if (ip->flags & IODF_ACTIVE)
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{
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unsigned char x = 0;
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putw (cp, reg, ip->start);
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putw (cp, reg+2, ip->start+ip->size-1);
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if (ip->flags & IODF_ZEROWS)
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x = PCIC_IO_0WS;
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if (ip->flags & IODF_WS)
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x |= PCIC_IO_WS;
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if (ip->flags & IODF_CS16)
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x |= PCIC_IO_CS16;
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else if (ip->flags & IODF_16BIT)
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x |= PCIC_IO_16BIT;
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/*
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* Extract the current flags and merge with new flags.
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* Flags for window 0 in lower nybble, and in upper nybble
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* for window 1.
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*/
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if (win)
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putb(cp, PCIC_IOCTL, (x << 4) |
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(getb(cp, PCIC_IOCTL) & 0xF));
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else
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putb(cp, PCIC_IOCTL, x | (getb(cp, PCIC_IOCTL) & 0xF0));
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setb (cp, PCIC_ADDRWINE, mask);
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DELAY(100);
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}
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else
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{
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clrb (cp, PCIC_ADDRWINE, mask);
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putw (cp, reg, 0);
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putw (cp, reg + 2, 0);
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}
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return(0);
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}
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/*
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* Look for an Intel PCIC (or compatible).
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* For each available slot, allocate a PC-CARD slot.
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*/
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int
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pcic_probe ()
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{
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int slot, i, validslots = 0;
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struct slot *sp;
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struct pcic_slot *cp;
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unsigned char c;
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/*
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* Initialise controller information structure.
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*/
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cinfo.mapmem = pcic_memory;
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cinfo.mapio = pcic_io;
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cinfo.ioctl = pcic_ioctl;
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cinfo.power = pcic_power;
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cinfo.mapirq = pcic_mapirq;
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cinfo.reset = pcic_reset;
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cinfo.disable = pcic_disable;
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cinfo.maxmem = PCIC_MEM_WIN;
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cinfo.maxio = PCIC_IO_WIN;
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cinfo.irqs = PCIC_INT_MASK_ALLOWED;
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#ifdef LKM
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bzero(pcic_slots, sizeof(pcic_slots));
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#endif
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cp = pcic_slots;
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for (slot = 0; slot < PCIC_MAX_SLOTS; slot++, cp++) {
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/*
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* Initialise the PCIC slot table.
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*/
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if (slot < 4)
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{
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cp->index = PCIC_INDEX_0;
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cp->data = PCIC_DATA_0;
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cp->offset = slot * PCIC_SLOT_SIZE;
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}
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else
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{
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cp->index = PCIC_INDEX_1;
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cp->data = PCIC_DATA_1;
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cp->offset = (slot - 4) * PCIC_SLOT_SIZE;
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}
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/*
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* see if there's a PCMCIA controller here
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* Intel PCMCIA controllers use 0x82 and 0x83
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* IBM clone chips use 0x88 and 0x89, apparently
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*/
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c = getb (cp, PCIC_ID_REV);
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cp->revision = -1;
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switch(c)
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{
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/*
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* 82365 or clones.
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*/
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case 0x82:
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case 0x83:
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cp->controller = PCIC_I82365;
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cp->revision = c & 1;
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/*
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* Now check for VADEM chips.
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*/
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outb(cp->index, 0x0E);
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outb(cp->index, 0x37);
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setb(cp, 0x3A, 0x40);
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c = getb (cp, PCIC_ID_REV);
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if (c & 0x08)
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{
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cp->controller = PCIC_VG468;
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cp->revision = c & 7;
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clrb(cp, 0x3A, 0x40);
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}
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break;
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/*
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* VLSI chips.
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*/
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case 0x84:
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cp->controller = PCIC_VLSI;
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break;
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case 0x88:
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case 0x89:
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cp->controller = PCIC_IBM;
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cp->revision = c & 1;
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break;
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default:
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continue;
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}
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/*
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* Check for Cirrus logic chips.
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*/
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putb(cp, 0x1F, 0);
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c = getb(cp, 0x1F);
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if ((c & 0xC0) == 0xC0)
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{
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c = getb(cp, 0x1F);
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if ((c & 0xC0) == 0)
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{
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if (c & 0x20)
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cp->controller = PCIC_PD672X;
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else
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cp->controller = PCIC_PD6710;
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cp->revision = 8 - ((c & 0x1F) >> 2);
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}
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}
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switch(cp->controller)
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{
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case PCIC_I82365:
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cinfo.name = "Intel 82365";
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break;
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case PCIC_IBM:
|
|
cinfo.name = "IBM PCIC";
|
|
break;
|
|
case PCIC_PD672X:
|
|
cinfo.name = "Cirrus Logic PD672X";
|
|
break;
|
|
case PCIC_PD6710:
|
|
cinfo.name = "Cirrus Logic PD6710";
|
|
break;
|
|
case PCIC_VG468:
|
|
cinfo.name = "Vadem 468";
|
|
break;
|
|
default:
|
|
cinfo.name = "Unknown!";
|
|
break;
|
|
}
|
|
/*
|
|
* clear out the registers.
|
|
*/
|
|
for (i = 2; i < 0x40; i++)
|
|
putb(cp, i, 0);
|
|
/*
|
|
* OK it seems we have a PCIC or lookalike.
|
|
* Allocate a slot and initialise the data structures.
|
|
*/
|
|
validslots++;
|
|
cp->slot = slot;
|
|
if (kdc_pcic[slot].kdc_state == DC_UNKNOWN) {
|
|
if (slot != 0)
|
|
kdc_pcic[slot] = kdc_pcic[0];
|
|
kdc_pcic[slot].kdc_unit = slot;
|
|
kdc_pcic[slot].kdc_state = DC_UNCONFIGURED;
|
|
kdc_pcic[slot].kdc_description = cinfo.name;
|
|
dev_attach(kdc_pcic+slot);
|
|
}
|
|
sp = pccard_alloc_slot(&cinfo);
|
|
if (sp == 0)
|
|
continue;
|
|
kdc_pcic[slot].kdc_state = DC_IDLE;
|
|
sp->cdata = cp;
|
|
cp->sp = sp;
|
|
/*
|
|
* If we haven't allocated an interrupt for the controller,
|
|
* then attempt to get one.
|
|
*/
|
|
if (pcic_irq == 0)
|
|
{
|
|
pcic_irq = pccard_alloc_intr(PCIC_INT_MASK_ALLOWED,
|
|
pcicintr, 0, &pcic_imask);
|
|
if (pcic_irq < 0)
|
|
printf("pcic: failed to allocate IRQ\n");
|
|
}
|
|
/*
|
|
* Check for a card in this slot.
|
|
*/
|
|
setb (cp, PCIC_POWER, PCIC_APSENA | PCIC_DISRST);
|
|
if ((getb (cp, PCIC_STATUS) & PCIC_CD) != PCIC_CD)
|
|
sp->laststate = sp->state = empty;
|
|
else
|
|
{
|
|
sp->laststate = sp->state = filled;
|
|
pccard_event(cp->sp, card_inserted);
|
|
}
|
|
/*
|
|
* Assign IRQ for slot changes
|
|
*/
|
|
if (pcic_irq > 0)
|
|
putb(cp, PCIC_STAT_INT, (pcic_irq << 4) | 0xF);
|
|
}
|
|
if (validslots)
|
|
timeout(pcictimeout,0,hz/2);
|
|
return(validslots);
|
|
}
|
|
/*
|
|
* ioctl calls - Controller specific ioctls
|
|
*/
|
|
static int
|
|
pcic_ioctl(struct slot *sp, int cmd, caddr_t data)
|
|
{
|
|
|
|
switch(cmd)
|
|
{
|
|
default:
|
|
return(EINVAL);
|
|
/*
|
|
* Get/set PCIC registers
|
|
*/
|
|
case PIOCGREG:
|
|
((struct pcic_reg *)data)->value =
|
|
getb(sp->cdata, ((struct pcic_reg *)data)->reg);
|
|
break;
|
|
case PIOCSREG:
|
|
putb(sp->cdata, ((struct pcic_reg *)data)->reg,
|
|
((struct pcic_reg *)data)->value);
|
|
break;
|
|
}
|
|
return(0);
|
|
}
|
|
/*
|
|
* pcic_power - Enable the power of the slot according to
|
|
* the parameters in the power structure(s).
|
|
*/
|
|
static int
|
|
pcic_power(struct slot *slotp)
|
|
{
|
|
unsigned char reg = PCIC_DISRST|PCIC_APSENA;
|
|
struct pcic_slot *sp = slotp->cdata;
|
|
|
|
switch(sp->controller)
|
|
{
|
|
case PCIC_PD672X:
|
|
case PCIC_PD6710:
|
|
switch(slotp->pwr.vpp)
|
|
{
|
|
default:
|
|
return(EINVAL);
|
|
case 0:
|
|
break;
|
|
case 50:
|
|
case 33:
|
|
reg |= PCIC_VPP_5V;
|
|
break;
|
|
case 120:
|
|
reg |= PCIC_VPP_12V;
|
|
break;
|
|
}
|
|
switch(slotp->pwr.vcc)
|
|
{
|
|
default:
|
|
return(EINVAL);
|
|
case 0:
|
|
break;
|
|
case 33:
|
|
reg |= PCIC_VCC_5V;
|
|
setb(sp, 0x16, 0x02);
|
|
break;
|
|
case 50:
|
|
reg |= PCIC_VCC_5V;
|
|
clrb(sp, 0x16, 0x02);
|
|
break;
|
|
}
|
|
}
|
|
putb (sp, PCIC_POWER, reg);
|
|
DELAY(300*1000);
|
|
if (slotp->pwr.vcc)
|
|
{
|
|
reg |= PCIC_OUTENA;
|
|
putb (sp, PCIC_POWER, reg);
|
|
DELAY (100*1000);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* tell the PCIC which irq we want to use. only the following are legal:
|
|
* 3, 4, 5, 7, 9, 10, 11, 12, 14, 15
|
|
*/
|
|
static void
|
|
pcic_mapirq (struct slot *slotp, int irq)
|
|
{
|
|
struct pcic_slot *sp = slotp->cdata;
|
|
|
|
if (irq == 0)
|
|
clrb(sp, PCIC_INT_GEN, 0xF);
|
|
else
|
|
putb (sp, PCIC_INT_GEN, (getb (sp, PCIC_INT_GEN) & 0xF0) | irq);
|
|
}
|
|
/*
|
|
* pcic_reset - Reset the card and enable initial power.
|
|
* Allow
|
|
*/
|
|
static void
|
|
pcic_reset(struct slot *slotp)
|
|
{
|
|
struct pcic_slot *sp = slotp->cdata;
|
|
|
|
clrb (sp, PCIC_INT_GEN, PCIC_CARDRESET);
|
|
DELAY (200*1000);
|
|
setb (sp, PCIC_INT_GEN, PCIC_CARDRESET|PCIC_IOCARD);
|
|
DELAY (200*1000);
|
|
if (sp->controller == PCIC_PD672X ||
|
|
sp->controller == PCIC_PD6710)
|
|
{
|
|
putb(sp, PCIC_TIME_SETUP0, 0x1);
|
|
putb(sp, PCIC_TIME_CMD0, 0x6);
|
|
putb(sp, PCIC_TIME_RECOV0, 0x0);
|
|
putb(sp, PCIC_TIME_SETUP1, 1);
|
|
putb(sp, PCIC_TIME_CMD1, 0x5F);
|
|
putb(sp, PCIC_TIME_RECOV1, 0);
|
|
}
|
|
}
|
|
/*
|
|
* pcic_disable - Disable the slot.
|
|
*/
|
|
static void
|
|
pcic_disable(struct slot *slotp)
|
|
{
|
|
struct pcic_slot *sp = slotp->cdata;
|
|
|
|
putb(sp, PCIC_INT_GEN, 0);
|
|
putb(sp, PCIC_POWER, 0);
|
|
}
|
|
|
|
/*
|
|
* PCIC timer, it seems that we loose interrupts sometimes
|
|
* so poll just in case...
|
|
*/
|
|
|
|
static void
|
|
pcictimeout()
|
|
{
|
|
timeout(pcictimeout,0,hz/2);
|
|
pcicintr(0);
|
|
}
|
|
|
|
/*
|
|
* PCIC Interrupt handler.
|
|
* Check each slot in turn, and read the card status change
|
|
* register. If this is non-zero, then a change has occurred
|
|
* on this card, so send an event to the main code.
|
|
*/
|
|
static void
|
|
pcicintr(int unit)
|
|
{
|
|
int slot, s;
|
|
unsigned char chg;
|
|
struct pcic_slot *cp = pcic_slots;
|
|
|
|
s = splhigh();
|
|
for (slot = 0; slot < PCIC_MAX_SLOTS; slot++, cp++)
|
|
if (cp->sp && (chg = getb(cp, PCIC_STAT_CHG)) != 0)
|
|
if (chg & PCIC_CDTCH) {
|
|
if ((getb(cp, PCIC_STATUS) & PCIC_CD) ==
|
|
PCIC_CD) {
|
|
kdc_pcic[slot].kdc_state = DC_BUSY;;
|
|
pccard_event(cp->sp,
|
|
card_inserted);
|
|
} else {
|
|
pccard_event(cp->sp,
|
|
card_removed);
|
|
kdc_pcic[slot].kdc_state = DC_IDLE;;
|
|
}
|
|
}
|
|
splx(s);
|
|
}
|