freebsd-skq/sys/sparc64/include
marius 5f0e19e7df Use the STICK timers only when absolutely necessary, i.e. if a machine
consists of CPUs running at different speeds, for driving hardclock as
these timers in turn are driven at frequencies as low as 5MHz, resulting
in bad granularity compared to the TICK timers. However, don't employ
the workaround for the BlackBird erratum #1 when using the TICK timer
on machines with cheetah-class CPUs for performance reasons.

Reported by:	Florian Smeets
2008-09-20 11:26:13 +00:00
..
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
asi.h For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages 2008-09-08 21:24:25 +00:00
asm.h
asmacros.h
atomic.h
bus_common.h
bus_dma.h
bus_private.h
bus.h
cache.h - USIII-based machines can consist of CPUs having different cache 2008-09-02 21:13:54 +00:00
ccr.h
clock.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
cpu.h Flesh out MMU and cache handling of cheetah-class CPUs. 2008-09-04 19:58:52 +00:00
cpufunc.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
db_machdep.h
dcr.h Flesh out MMU and cache handling of cheetah-class CPUs. 2008-09-04 19:58:52 +00:00
elf.h
endian.h
exec.h
float.h
floatingpoint.h
fp.h
frame.h
fsr.h
gdb_machdep.h
idprom.h
ieee.h
ieeefp.h
in_cksum.h
instr.h
intr_machdep.h
iommureg.h
iommuvar.h
kdb.h
kerneldump.h
ktr.h
limits.h
lsu.h
md_var.h
memdev.h
metadata.h
mutex.h Modify the critical section API as follows: 2001-12-18 00:27:18 +00:00
ofw_bus.h
ofw_machdep.h
ofw_mem.h
ofw_nexus.h
param.h
pcb.h
pcpu.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
pmap.h
pmc_mdep.h
proc.h
profile.h
pstate.h
ptrace.h
reg.h
reloc.h
resource.h
runq.h
sc_machdep.h
setjmp.h
sf_buf.h
sigframe.h
signal.h
smp.h - Newer firmware versions no longer provide SUNW,stop-self so just 2008-09-18 13:56:30 +00:00
stack.h
stdarg.h
sysarch.h
tick.h Use the STICK timers only when absolutely necessary, i.e. if a machine 2008-09-20 11:26:13 +00:00
tlb.h For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages 2008-09-08 21:24:25 +00:00
trap.h Use the PROM provided SUNW,set-trap-table to take over the trap 2008-09-04 20:52:54 +00:00
tsb.h
tstate.h
tte.h The physical address space of cheetah-class CPUs has been extended 2008-09-04 19:43:14 +00:00
ucontext.h
upa.h
utrap.h
varargs.h
ver.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
vmparam.h
watch.h
wstate.h