186 lines
5.0 KiB
C
186 lines
5.0 KiB
C
/*
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* Device probe and attach routines for the following
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* Advanced Systems Inc. SCSI controllers:
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*
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* ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB)
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*
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* Copyright (c) 1998 Justin Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*/
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#include <pci.h>
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#if NPCI > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <cam/cam.h>
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#include <cam/scsi/scsi_all.h>
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#include <dev/advansys/adwvar.h>
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#include <dev/advansys/adwlib.h>
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#include <dev/advansys/adwmcode.h>
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#define PCI_BASEADR0 PCI_MAP_REG_START /* I/O Address */
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#define PCI_BASEADR1 PCI_MAP_REG_START + 4 /* Mem I/O Address */
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#define PCI_DEVICE_ID_ADVANSYS_3550 0x230010CD
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#define ADW_PCI_MAX_DMA_ADDR (0xFFFFFFFFUL)
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#define ADW_PCI_MAX_DMA_COUNT (0xFFFFFFFFUL)
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static char* adwpciprobe(pcici_t tag, pcidi_t type);
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static void adwpciattach(pcici_t config_id, int unit);
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static struct pci_device adw_pci_driver = {
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"adw",
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adwpciprobe,
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adwpciattach,
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&adw_unit,
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NULL
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};
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DATA_SET (pcidevice_set, adw_pci_driver);
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static char*
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adwpciprobe(pcici_t tag, pcidi_t type)
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{
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switch (type) {
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case PCI_DEVICE_ID_ADVANSYS_3550:
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return ("AdvanSys ASC3550 SCSI controller");
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default:
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break;
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}
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return (NULL);
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}
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static void
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adwpciattach(pcici_t config_id, int unit)
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{
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u_int32_t id;
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u_int32_t command;
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vm_offset_t vaddr;
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vm_offset_t paddr;
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u_int16_t io_port;
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bus_space_tag_t tag;
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bus_space_handle_t bsh;
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struct adw_softc *adw;
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int error;
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/*
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* Determine the chip version.
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*/
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id = pci_cfgread(config_id, PCI_ID_REG, /*bytes*/4);
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command = pci_cfgread(config_id, PCIR_COMMAND, /*bytes*/1);
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/*
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* These cards do not allow memory mapped accesses, so we must
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* ensure that I/O accesses are available or we won't be able
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* to talk to them.
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*/
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vaddr = 0;
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#ifdef ADW_ALLOW_MEMIO
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if ((command & PCI_COMMAND_MEM_ENABLE) == 0
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|| (pci_map_mem(config_id, PCI_BASEADR1, &vaddr, &paddr)) == 0)
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#endif
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if ((command & PCI_COMMAND_IO_ENABLE) == 0
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|| (pci_map_port(config_id, PCI_BASEADR0, &io_port)) == 0)
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return;
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/* XXX Should be passed in by parent bus */
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/* XXX Why isn't the 0x10 offset incorporated into the reg defs? */
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if (vaddr != 0) {
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tag = I386_BUS_SPACE_MEM;
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bsh = vaddr;
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} else {
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tag = I386_BUS_SPACE_IO;
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bsh = io_port;
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}
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if (adw_find_signature(tag, bsh) == 0)
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return;
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adw = adw_alloc(unit, tag, bsh);
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if (adw == NULL)
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return;
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/* Allocate a dmatag for our transfer DMA maps */
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/* XXX Should be a child of the PCI bus dma tag */
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error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/0,
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/*boundary*/0,
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/*lowaddr*/ADW_PCI_MAX_DMA_ADDR,
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/*highaddr*/BUS_SPACE_MAXADDR,
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/*filter*/NULL, /*filterarg*/NULL,
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/*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
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/*nsegments*/BUS_SPACE_UNRESTRICTED,
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/*maxsegsz*/ADW_PCI_MAX_DMA_COUNT,
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/*flags*/0,
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&adw->parent_dmat);
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adw->init_level++;
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if (error != 0) {
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printf("%s: Could not allocate DMA tag - error %d\n",
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adw_name(adw), error);
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adw_free(adw);
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return;
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}
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adw->init_level++;
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if (adw_init(adw) != 0) {
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adw_free(adw);
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return;
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}
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/*
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* If the PCI Configuration Command Register "Parity Error Response
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* Control" Bit was clear (0), then set the microcode variable
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* 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
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* to ignore DMA parity errors.
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*/
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if ((command & PCIM_CMD_PERRESPEN) == 0)
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adw_lram_write_16(adw, ADW_MC_CONTROL_FLAG,
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adw_lram_read_16(adw, ADW_MC_CONTROL_FLAG)
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| ADW_MC_CONTROL_IGN_PERR);
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if ((pci_map_int(config_id, adw_intr, (void *)adw, &cam_imask)) == 0) {
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adw_free(adw);
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return;
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}
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adw_attach(adw);
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}
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#endif /* NPCI > 0 */
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