Jeff Roberson 40380a6a6b - Optimize the amd64 cpu_switch() TD_LOCK blocking and releasing to ...

require fewer blocking loops.
 - Don't use atomic ops with 4BSD or on UP.
 - Only use the blocking loop if ULE is compiled in.
 - Use the correct memory barrier.

Discussed with:	attilio, jhb, ssouhlal
Tested by:	current@
Approved by:	re

2007-07-17 22:36:56 +00:00

..

acpica

Handle CPUs with APIC IDs higher than 32 (at least one IBM server uses

2007-05-08 22:01:04 +00:00

amd64

- Optimize the amd64 cpu_switch() TD_LOCK blocking and releasing to

2007-07-17 22:36:56 +00:00

compile

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conf

Temporary disconnect i4bing, i4bisppp and i4bipr from the build for

2007-07-04 00:18:39 +00:00

ia32

Optimize vmmeter locking.

2007-06-10 21:59:14 +00:00

include

Add kdb_cpu_sync_icache(), intended to synchronize instruction

2007-06-09 21:55:17 +00:00

isa

Prototype (but functional) Linux-ish /dev/nvram interface to the extra

2007-06-15 22:58:14 +00:00

linux32

Fix a couple of issues with the stack limit for 32-bit processes on 64-bit

2007-07-12 18:01:31 +00:00

pci

Revamp the MSI/MSI-X code a bit to achieve two main goals:

2007-05-02 17:50:36 +00:00

Makefile

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