3d5b3b0a44
o Move descriptors allocation to DMA engine driver o Add generic xdma_request() routine o Add less-generic scatter-gather application based on xdma interface Typical operation flow in peripheral device driver is: 1. Get xDMA controller sc->xdma_tx = xdma_ofw_get(sc->dev, "tx"); 2. Allocate virtual channel sc->xchan_tx = xdma_channel_alloc(sc->xdma_tx, caps); 3. Setup transfer status callback xdma_setup_intr(sc->xchan_tx, my_tx_intr, sc, &sc->ih_tx); 4. Request a transfer(s) ret = xdma_request(sc->xchan_tx, &req); 5. Free the channel xdma_channel_free(sc->xdma_tx); 6. Free the controller xdma_put(sc->xdma_tx); Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D14971
810 lines
16 KiB
C
810 lines
16 KiB
C
/*-
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* Copyright (c) 2016-2018 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* Ingenic JZ4780 Audio Interface Controller (AIC). */
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/sound/pcm/sound.h>
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#include <dev/sound/chip.h>
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#include <mixer_if.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/xdma/xdma.h>
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#include <mips/ingenic/jz4780_common.h>
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#include <mips/ingenic/jz4780_aic.h>
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#define AIC_NCHANNELS 1
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struct aic_softc {
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device_t dev;
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struct resource *res[1];
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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struct mtx *lock;
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int pos;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_addr_t buf_base_phys;
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uint32_t *buf_base;
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uintptr_t aic_fifo_paddr;
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int dma_size;
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clk_t clk_aic;
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clk_t clk_i2s;
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struct aic_rate *sr;
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void *ih;
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int internal_codec;
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/* xDMA */
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struct xdma_channel *xchan;
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xdma_controller_t *xdma_tx;
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struct xdma_request req;
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};
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/* Channel registers */
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struct sc_chinfo {
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struct snd_dbuf *buffer;
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struct pcm_channel *channel;
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struct sc_pcminfo *parent;
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/* Channel information */
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uint32_t dir;
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uint32_t format;
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/* Flags */
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uint32_t run;
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};
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/* PCM device private data */
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struct sc_pcminfo {
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device_t dev;
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uint32_t chnum;
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struct sc_chinfo chan[AIC_NCHANNELS];
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struct aic_softc *sc;
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};
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static struct resource_spec aic_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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static int aic_probe(device_t dev);
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static int aic_attach(device_t dev);
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static int aic_detach(device_t dev);
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static int setup_xdma(struct sc_pcminfo *scp);
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struct aic_rate {
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uint32_t speed;
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};
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static struct aic_rate rate_map[] = {
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{ 48000 },
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/* TODO: add more frequences */
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{ 0 },
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};
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/*
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* Mixer interface.
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*/
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static int
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aicmixer_init(struct snd_mixer *m)
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{
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struct sc_pcminfo *scp;
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struct aic_softc *sc;
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int mask;
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scp = mix_getdevinfo(m);
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sc = scp->sc;
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if (sc == NULL)
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return -1;
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mask = SOUND_MASK_PCM;
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snd_mtxlock(sc->lock);
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pcm_setflags(scp->dev, pcm_getflags(scp->dev) | SD_F_SOFTPCMVOL);
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mix_setdevs(m, mask);
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snd_mtxunlock(sc->lock);
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return (0);
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}
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static int
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aicmixer_set(struct snd_mixer *m, unsigned dev,
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unsigned left, unsigned right)
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{
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struct sc_pcminfo *scp;
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scp = mix_getdevinfo(m);
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/* Here we can configure hardware volume on our DAC */
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return (0);
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}
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static kobj_method_t aicmixer_methods[] = {
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KOBJMETHOD(mixer_init, aicmixer_init),
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KOBJMETHOD(mixer_set, aicmixer_set),
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KOBJMETHOD_END
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};
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MIXER_DECLARE(aicmixer);
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/*
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* Channel interface.
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*/
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static void *
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aicchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
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struct pcm_channel *c, int dir)
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{
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struct sc_pcminfo *scp;
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struct sc_chinfo *ch;
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struct aic_softc *sc;
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scp = (struct sc_pcminfo *)devinfo;
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sc = scp->sc;
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snd_mtxlock(sc->lock);
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ch = &scp->chan[0];
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ch->dir = dir;
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ch->run = 0;
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ch->buffer = b;
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ch->channel = c;
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ch->parent = scp;
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snd_mtxunlock(sc->lock);
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if (sndbuf_setup(ch->buffer, sc->buf_base, sc->dma_size) != 0) {
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device_printf(scp->dev, "Can't setup sndbuf.\n");
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return NULL;
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}
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return (ch);
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}
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static int
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aicchan_free(kobj_t obj, void *data)
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{
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struct sc_chinfo *ch = data;
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struct sc_pcminfo *scp = ch->parent;
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struct aic_softc *sc = scp->sc;
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snd_mtxlock(sc->lock);
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/* TODO: free channel buffer */
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snd_mtxunlock(sc->lock);
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return (0);
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}
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static int
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aicchan_setformat(kobj_t obj, void *data, uint32_t format)
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{
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struct sc_pcminfo *scp;
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struct sc_chinfo *ch;
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ch = data;
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scp = ch->parent;
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ch->format = format;
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return (0);
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}
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static uint32_t
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aicchan_setspeed(kobj_t obj, void *data, uint32_t speed)
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{
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struct sc_pcminfo *scp;
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struct sc_chinfo *ch;
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struct aic_rate *sr;
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struct aic_softc *sc;
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int threshold;
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int i;
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ch = data;
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scp = ch->parent;
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sc = scp->sc;
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sr = NULL;
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/* First look for equal frequency. */
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for (i = 0; rate_map[i].speed != 0; i++) {
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if (rate_map[i].speed == speed)
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sr = &rate_map[i];
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}
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/* If no match, just find nearest. */
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if (sr == NULL) {
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for (i = 0; rate_map[i].speed != 0; i++) {
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sr = &rate_map[i];
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threshold = sr->speed + ((rate_map[i + 1].speed != 0) ?
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((rate_map[i + 1].speed - sr->speed) >> 1) : 0);
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if (speed < threshold)
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break;
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}
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}
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sc->sr = sr;
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/* Clocks can be reconfigured here. */
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return (sr->speed);
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}
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static uint32_t
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aicchan_setblocksize(kobj_t obj, void *data, uint32_t blocksize)
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{
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struct sc_pcminfo *scp;
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struct sc_chinfo *ch;
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struct aic_softc *sc;
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ch = data;
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scp = ch->parent;
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sc = scp->sc;
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sndbuf_resize(ch->buffer, sc->dma_size / blocksize, blocksize);
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return (sndbuf_getblksz(ch->buffer));
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}
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static int
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aic_intr(void *arg, xdma_transfer_status_t *status)
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{
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struct sc_pcminfo *scp;
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struct xdma_request *req;
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xdma_channel_t *xchan;
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struct sc_chinfo *ch;
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struct aic_softc *sc;
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int bufsize;
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scp = arg;
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sc = scp->sc;
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ch = &scp->chan[0];
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req = &sc->req;
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xchan = sc->xchan;
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bufsize = sndbuf_getsize(ch->buffer);
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sc->pos += req->block_len;
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if (sc->pos >= bufsize)
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sc->pos -= bufsize;
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if (ch->run)
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chn_intr(ch->channel);
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return (0);
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}
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static int
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setup_xdma(struct sc_pcminfo *scp)
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{
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struct aic_softc *sc;
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struct sc_chinfo *ch;
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int fmt;
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int err;
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ch = &scp->chan[0];
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sc = scp->sc;
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fmt = sndbuf_getfmt(ch->buffer);
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KASSERT(fmt & AFMT_16BIT, ("16-bit audio supported only."));
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sc->req.operation = XDMA_CYCLIC;
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sc->req.req_type = XR_TYPE_PHYS;
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sc->req.direction = XDMA_MEM_TO_DEV;
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sc->req.src_addr = sc->buf_base_phys;
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sc->req.dst_addr = sc->aic_fifo_paddr;
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sc->req.src_width = 2;
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sc->req.dst_width = 2;
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sc->req.block_len = sndbuf_getblksz(ch->buffer);
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sc->req.block_num = sndbuf_getblkcnt(ch->buffer);
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err = xdma_request(sc->xchan, &sc->req);
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if (err != 0) {
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device_printf(sc->dev, "Can't configure virtual channel\n");
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return (-1);
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}
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xdma_control(sc->xchan, XDMA_CMD_BEGIN);
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return (0);
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}
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static int
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aic_start(struct sc_pcminfo *scp)
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{
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struct aic_softc *sc;
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int reg;
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sc = scp->sc;
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/* Ensure clock enabled. */
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reg = READ4(sc, I2SCR);
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reg |= (I2SCR_ESCLK);
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WRITE4(sc, I2SCR, reg);
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setup_xdma(scp);
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reg = (AICCR_OSS_16 | AICCR_ISS_16);
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reg |= (AICCR_CHANNEL_2);
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reg |= (AICCR_TDMS);
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reg |= (AICCR_ERPL);
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WRITE4(sc, AICCR, reg);
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return (0);
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}
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static int
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aic_stop(struct sc_pcminfo *scp)
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{
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struct aic_softc *sc;
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int reg;
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sc = scp->sc;
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reg = READ4(sc, AICCR);
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reg &= ~(AICCR_TDMS | AICCR_ERPL);
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WRITE4(sc, AICCR, reg);
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xdma_control(sc->xchan, XDMA_CMD_TERMINATE);
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return (0);
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}
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static int
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aicchan_trigger(kobj_t obj, void *data, int go)
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{
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struct sc_pcminfo *scp;
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struct sc_chinfo *ch;
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struct aic_softc *sc;
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ch = data;
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scp = ch->parent;
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sc = scp->sc;
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snd_mtxlock(sc->lock);
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switch (go) {
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case PCMTRIG_START:
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ch->run = 1;
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sc->pos = 0;
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aic_start(scp);
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break;
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case PCMTRIG_STOP:
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case PCMTRIG_ABORT:
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ch->run = 0;
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aic_stop(scp);
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sc->pos = 0;
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bzero(sc->buf_base, sc->dma_size);
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break;
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}
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snd_mtxunlock(sc->lock);
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return (0);
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}
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static uint32_t
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aicchan_getptr(kobj_t obj, void *data)
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{
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struct sc_pcminfo *scp;
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struct sc_chinfo *ch;
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struct aic_softc *sc;
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ch = data;
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scp = ch->parent;
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sc = scp->sc;
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return (sc->pos);
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}
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static uint32_t aic_pfmt[] = {
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SND_FORMAT(AFMT_S16_LE, 2, 0),
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0
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};
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static struct pcmchan_caps aic_pcaps = {48000, 48000, aic_pfmt, 0};
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static struct pcmchan_caps *
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aicchan_getcaps(kobj_t obj, void *data)
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{
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return (&aic_pcaps);
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}
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static kobj_method_t aicchan_methods[] = {
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KOBJMETHOD(channel_init, aicchan_init),
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KOBJMETHOD(channel_free, aicchan_free),
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KOBJMETHOD(channel_setformat, aicchan_setformat),
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KOBJMETHOD(channel_setspeed, aicchan_setspeed),
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KOBJMETHOD(channel_setblocksize, aicchan_setblocksize),
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KOBJMETHOD(channel_trigger, aicchan_trigger),
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KOBJMETHOD(channel_getptr, aicchan_getptr),
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KOBJMETHOD(channel_getcaps, aicchan_getcaps),
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KOBJMETHOD_END
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};
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CHANNEL_DECLARE(aicchan);
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static void
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aic_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
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{
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bus_addr_t *addr;
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if (err)
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return;
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addr = (bus_addr_t*)arg;
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*addr = segs[0].ds_addr;
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}
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static int
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aic_dma_setup(struct aic_softc *sc)
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{
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device_t dev;
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int err;
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dev = sc->dev;
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/* DMA buffer size. */
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sc->dma_size = 131072;
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/*
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* Must use dma_size boundary as modulo feature required.
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* Modulo feature allows setup circular buffer.
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*/
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err = bus_dma_tag_create(
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bus_get_dma_tag(sc->dev),
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4, sc->dma_size, /* alignment, boundary */
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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sc->dma_size, 1, /* maxsize, nsegments */
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sc->dma_size, 0, /* maxsegsize, flags */
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NULL, NULL, /* lockfunc, lockarg */
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&sc->dma_tag);
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if (err) {
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device_printf(dev, "cannot create bus dma tag\n");
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return (-1);
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}
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err = bus_dmamem_alloc(sc->dma_tag, (void **)&sc->buf_base,
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BUS_DMA_WAITOK | BUS_DMA_COHERENT, &sc->dma_map);
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if (err) {
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device_printf(dev, "cannot allocate memory\n");
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return (-1);
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}
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err = bus_dmamap_load(sc->dma_tag, sc->dma_map, sc->buf_base,
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sc->dma_size, aic_dmamap_cb, &sc->buf_base_phys, BUS_DMA_WAITOK);
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if (err) {
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device_printf(dev, "cannot load DMA map\n");
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return (-1);
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}
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bzero(sc->buf_base, sc->dma_size);
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return (0);
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}
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static int
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aic_configure_clocks(struct aic_softc *sc)
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{
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uint64_t aic_freq;
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uint64_t i2s_freq;
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device_t dev;
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int err;
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|
|
dev = sc->dev;
|
|
|
|
err = clk_get_by_ofw_name(sc->dev, 0, "aic", &sc->clk_aic);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't find aic clock.\n");
|
|
return (-1);
|
|
}
|
|
|
|
err = clk_enable(sc->clk_aic);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't enable aic clock.\n");
|
|
return (-1);
|
|
}
|
|
|
|
err = clk_get_by_ofw_name(sc->dev, 0, "i2s", &sc->clk_i2s);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't find i2s clock.\n");
|
|
return (-1);
|
|
}
|
|
|
|
err = clk_enable(sc->clk_i2s);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't enable i2s clock.\n");
|
|
return (-1);
|
|
}
|
|
|
|
err = clk_set_freq(sc->clk_i2s, 12000000, 0);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't set i2s frequency.\n");
|
|
return (-1);
|
|
}
|
|
|
|
clk_get_freq(sc->clk_aic, &aic_freq);
|
|
clk_get_freq(sc->clk_i2s, &i2s_freq);
|
|
|
|
device_printf(dev, "Frequency aic %d i2s %d\n",
|
|
(uint32_t)aic_freq, (uint32_t)i2s_freq);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
aic_configure(struct aic_softc *sc)
|
|
{
|
|
int reg;
|
|
|
|
WRITE4(sc, AICFR, AICFR_RST);
|
|
|
|
/* Configure AIC */
|
|
reg = 0;
|
|
if (sc->internal_codec) {
|
|
reg |= (AICFR_ICDC);
|
|
} else {
|
|
reg |= (AICFR_SYNCD | AICFR_BCKD);
|
|
}
|
|
reg |= (AICFR_AUSEL); /* I2S/MSB-justified format. */
|
|
reg |= (AICFR_TFTH(8)); /* Transmit FIFO threshold */
|
|
reg |= (AICFR_RFTH(7)); /* Receive FIFO threshold */
|
|
WRITE4(sc, AICFR, reg);
|
|
|
|
reg = READ4(sc, AICFR);
|
|
reg |= (AICFR_ENB); /* Enable the controller. */
|
|
WRITE4(sc, AICFR, reg);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
sysctl_hw_pcm_internal_codec(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
struct sc_pcminfo *scp;
|
|
struct sc_chinfo *ch;
|
|
struct aic_softc *sc;
|
|
int error, val;
|
|
|
|
if (arg1 == NULL)
|
|
return (EINVAL);
|
|
|
|
scp = arg1;
|
|
sc = scp->sc;
|
|
ch = &scp->chan[0];
|
|
|
|
snd_mtxlock(sc->lock);
|
|
|
|
val = sc->internal_codec;
|
|
error = sysctl_handle_int(oidp, &val, 0, req);
|
|
if (error || req->newptr == NULL) {
|
|
snd_mtxunlock(sc->lock);
|
|
return (error);
|
|
}
|
|
if (val < 0 || val > 1) {
|
|
snd_mtxunlock(sc->lock);
|
|
return (EINVAL);
|
|
}
|
|
|
|
if (sc->internal_codec != val) {
|
|
sc->internal_codec = val;
|
|
if (ch->run)
|
|
aic_stop(scp);
|
|
aic_configure(sc);
|
|
if (ch->run)
|
|
aic_start(scp);
|
|
}
|
|
|
|
snd_mtxunlock(sc->lock);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
aic_probe(device_t dev)
|
|
{
|
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
return (ENXIO);
|
|
|
|
if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-i2s"))
|
|
return (ENXIO);
|
|
|
|
device_set_desc(dev, "Audio Interface Controller");
|
|
|
|
return (BUS_PROBE_DEFAULT);
|
|
}
|
|
|
|
static int
|
|
aic_attach(device_t dev)
|
|
{
|
|
char status[SND_STATUSLEN];
|
|
struct sc_pcminfo *scp;
|
|
struct aic_softc *sc;
|
|
int err;
|
|
|
|
sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
|
|
sc->dev = dev;
|
|
sc->pos = 0;
|
|
sc->internal_codec = 1;
|
|
|
|
/* Get xDMA controller */
|
|
sc->xdma_tx = xdma_ofw_get(sc->dev, "tx");
|
|
if (sc->xdma_tx == NULL) {
|
|
device_printf(dev, "Can't find DMA controller.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Alloc xDMA virtual channel. */
|
|
sc->xchan = xdma_channel_alloc(sc->xdma_tx, 0);
|
|
if (sc->xchan == NULL) {
|
|
device_printf(dev, "Can't alloc virtual DMA channel.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Setup sound subsystem */
|
|
sc->lock = snd_mtxcreate(device_get_nameunit(dev), "aic softc");
|
|
if (sc->lock == NULL) {
|
|
device_printf(dev, "Can't create mtx.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
if (bus_alloc_resources(dev, aic_spec, sc->res)) {
|
|
device_printf(dev,
|
|
"could not allocate resources for device\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Memory interface */
|
|
sc->bst = rman_get_bustag(sc->res[0]);
|
|
sc->bsh = rman_get_bushandle(sc->res[0]);
|
|
sc->aic_fifo_paddr = rman_get_start(sc->res[0]) + AICDR;
|
|
|
|
/* Setup PCM. */
|
|
scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_WAITOK | M_ZERO);
|
|
scp->sc = sc;
|
|
scp->dev = dev;
|
|
|
|
/* Setup audio buffer. */
|
|
err = aic_dma_setup(sc);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't setup sound buffer.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Setup clocks. */
|
|
err = aic_configure_clocks(sc);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't configure clocks.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
err = aic_configure(sc);
|
|
if (err != 0) {
|
|
device_printf(dev, "Can't configure AIC.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE);
|
|
|
|
/* Setup interrupt handler. */
|
|
err = xdma_setup_intr(sc->xchan, aic_intr, scp, &sc->ih);
|
|
if (err) {
|
|
device_printf(sc->dev,
|
|
"Can't setup xDMA interrupt handler.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
err = pcm_register(dev, scp, 1, 0);
|
|
if (err) {
|
|
device_printf(dev, "Can't register pcm.\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
scp->chnum = 0;
|
|
pcm_addchan(dev, PCMDIR_PLAY, &aicchan_class, scp);
|
|
scp->chnum++;
|
|
|
|
snprintf(status, SND_STATUSLEN, "at %s", ofw_bus_get_name(dev));
|
|
pcm_setstatus(dev, status);
|
|
|
|
mixer_init(dev, &aicmixer_class, scp);
|
|
|
|
/* Create device sysctl node. */
|
|
SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
|
|
SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
|
|
OID_AUTO, "internal_codec", CTLTYPE_INT | CTLFLAG_RW,
|
|
scp, 0, sysctl_hw_pcm_internal_codec, "I",
|
|
"use internal audio codec");
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
aic_detach(device_t dev)
|
|
{
|
|
struct aic_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
xdma_channel_free(sc->xchan);
|
|
|
|
bus_release_resources(dev, aic_spec, sc->res);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t aic_pcm_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, aic_probe),
|
|
DEVMETHOD(device_attach, aic_attach),
|
|
DEVMETHOD(device_detach, aic_detach),
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t aic_pcm_driver = {
|
|
"pcm",
|
|
aic_pcm_methods,
|
|
PCM_SOFTC_SIZE,
|
|
};
|
|
|
|
DRIVER_MODULE(aic, simplebus, aic_pcm_driver, pcm_devclass, 0, 0);
|
|
MODULE_DEPEND(aic, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
|
|
MODULE_VERSION(aic, 1);
|