720eab5d5c
Very early (PCI_V0) Broadcom PCI Wi-Fi chipsets have a few quirks when compared to later PCI(e) core revisions: - The standard static BAR0 mapping of the PCI core registers is discontiguous, with siba's cfg0 register block mapped distinctly from the other core registers. - No dedicated ChipCommon register mapping is provided; instead, the single configurable register window must be used to access both ChipCommon and D11 core registers. The D11 core's operational semantics guarantee the safety of -- after disabling interrupts -- borrowing the single dynamic register window to perform the few ChipCommon operations required by a driver. To support these early PCI devices: - Allow defining multiple discontiguous BHNDB_REGWIN_T_CORE register windows that map a single port/region, and producing bridged resource allocations backed by those discontiguous windows. - Support stealing existing register window allocations to fulfill indirect bhnd(4) bus I/O requests within address ranges tagged with BHNDB_ALLOC_FULFILL_ON_OVERCOMMIT. - Fix an inverted test of bhndb_is_pcie_attached() that disabled PCI-only clock bring-up required by these devices. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation
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