d8198c572a
based on Solarflare SFC9000 family controllers. The driver supports jumbo frames, transmit/receive checksum offload, TCP Segmentation Offload (TSO), Large Receive Offload (LRO), VLAN checksum offload, VLAN TSO, and Receive Side Scaling (RSS) using MSI-X interrupts. This work was sponsored by Solarflare Communications, Inc. My sincere thanks to Ben Hutchings for doing a lot of the hard work! Sponsored by: Solarflare Communications, Inc. MFC after: 3 weeks
863 lines
18 KiB
C
863 lines
18 KiB
C
/*-
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* Copyright (c) 2010-2011 Solarflare Communications, Inc.
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* All rights reserved.
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*
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* This software was developed in part by Philip Paeps under contract for
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* Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include "common/efx.h"
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#include "sfxge.h"
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static void
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sfxge_ev_qcomplete(struct sfxge_evq *evq, boolean_t eop)
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{
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struct sfxge_softc *sc;
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unsigned int index;
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struct sfxge_rxq *rxq;
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struct sfxge_txq *txq;
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sc = evq->sc;
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index = evq->index;
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rxq = sc->rxq[index];
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if ((txq = evq->txq) != NULL) {
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evq->txq = NULL;
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evq->txqs = &(evq->txq);
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do {
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struct sfxge_txq *next;
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next = txq->next;
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txq->next = NULL;
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KASSERT(txq->evq_index == index,
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("txq->evq_index != index"));
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if (txq->pending != txq->completed)
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sfxge_tx_qcomplete(txq);
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txq = next;
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} while (txq != NULL);
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}
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if (rxq->pending != rxq->completed)
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sfxge_rx_qcomplete(rxq, eop);
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}
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static boolean_t
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sfxge_ev_rx(void *arg, uint32_t label, uint32_t id, uint32_t size,
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uint16_t flags)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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struct sfxge_rxq *rxq;
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unsigned int expected;
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struct sfxge_rx_sw_desc *rx_desc;
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evq = arg;
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sc = evq->sc;
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if (evq->exception)
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goto done;
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rxq = sc->rxq[label];
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KASSERT(rxq != NULL, ("rxq == NULL"));
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KASSERT(evq->index == rxq->index,
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("evq->index != rxq->index"));
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if (rxq->init_state != SFXGE_RXQ_STARTED)
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goto done;
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expected = rxq->pending++ & (SFXGE_NDESCS - 1);
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if (id != expected) {
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evq->exception = B_TRUE;
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device_printf(sc->dev, "RX completion out of order"
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" (id=%#x expected=%#x flags=%#x); resetting\n",
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id, expected, flags);
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sfxge_schedule_reset(sc);
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goto done;
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}
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rx_desc = &rxq->queue[id];
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KASSERT(rx_desc->flags == EFX_DISCARD,
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("rx_desc->flags != EFX_DISCARD"));
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rx_desc->flags = flags;
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KASSERT(size < (1 << 16), ("size > (1 << 16)"));
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rx_desc->size = (uint16_t)size;
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prefetch_read_many(rx_desc->mbuf);
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evq->rx_done++;
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if (rxq->pending - rxq->completed >= SFXGE_RX_BATCH)
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sfxge_ev_qcomplete(evq, B_FALSE);
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done:
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return (evq->rx_done >= SFXGE_EV_BATCH);
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}
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static boolean_t
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sfxge_ev_exception(void *arg, uint32_t code, uint32_t data)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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evq = (struct sfxge_evq *)arg;
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sc = evq->sc;
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evq->exception = B_TRUE;
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if (code != EFX_EXCEPTION_UNKNOWN_SENSOREVT) {
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device_printf(sc->dev,
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"hardware exception (code=%u); resetting\n",
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code);
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sfxge_schedule_reset(sc);
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}
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_rxq_flush_done(void *arg, uint32_t label)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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struct sfxge_rxq *rxq;
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unsigned int index;
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uint16_t magic;
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evq = (struct sfxge_evq *)arg;
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sc = evq->sc;
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rxq = sc->rxq[label];
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KASSERT(rxq != NULL, ("rxq == NULL"));
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/* Resend a software event on the correct queue */
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index = rxq->index;
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evq = sc->evq[index];
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KASSERT((label & SFXGE_MAGIC_DMAQ_LABEL_MASK) == label,
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("(label & SFXGE_MAGIC_DMAQ_LABEL_MASK) != level"));
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magic = SFXGE_MAGIC_RX_QFLUSH_DONE | label;
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KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
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("evq not started"));
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efx_ev_qpost(evq->common, magic);
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_rxq_flush_failed(void *arg, uint32_t label)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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struct sfxge_rxq *rxq;
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unsigned int index;
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uint16_t magic;
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evq = (struct sfxge_evq *)arg;
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sc = evq->sc;
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rxq = sc->rxq[label];
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KASSERT(rxq != NULL, ("rxq == NULL"));
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/* Resend a software event on the correct queue */
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index = rxq->index;
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evq = sc->evq[index];
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KASSERT((label & SFXGE_MAGIC_DMAQ_LABEL_MASK) == label,
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("(label & SFXGE_MAGIC_DMAQ_LABEL_MASK) != label"));
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magic = SFXGE_MAGIC_RX_QFLUSH_FAILED | label;
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KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
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("evq not started"));
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efx_ev_qpost(evq->common, magic);
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_tx(void *arg, uint32_t label, uint32_t id)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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struct sfxge_txq *txq;
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unsigned int stop;
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unsigned int delta;
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evq = (struct sfxge_evq *)arg;
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sc = evq->sc;
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txq = sc->txq[label];
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KASSERT(txq != NULL, ("txq == NULL"));
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KASSERT(evq->index == txq->evq_index,
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("evq->index != txq->evq_index"));
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if (txq->init_state != SFXGE_TXQ_STARTED)
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goto done;
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stop = (id + 1) & (SFXGE_NDESCS - 1);
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id = txq->pending & (SFXGE_NDESCS - 1);
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delta = (stop >= id) ? (stop - id) : (SFXGE_NDESCS - id + stop);
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txq->pending += delta;
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evq->tx_done++;
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if (txq->next == NULL &&
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evq->txqs != &(txq->next)) {
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*(evq->txqs) = txq;
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evq->txqs = &(txq->next);
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}
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if (txq->pending - txq->completed >= SFXGE_TX_BATCH)
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sfxge_tx_qcomplete(txq);
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done:
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return (evq->tx_done >= SFXGE_EV_BATCH);
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}
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static boolean_t
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sfxge_ev_txq_flush_done(void *arg, uint32_t label)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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struct sfxge_txq *txq;
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uint16_t magic;
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evq = (struct sfxge_evq *)arg;
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sc = evq->sc;
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txq = sc->txq[label];
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KASSERT(txq != NULL, ("txq == NULL"));
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KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
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("txq not initialized"));
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/* Resend a software event on the correct queue */
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evq = sc->evq[txq->evq_index];
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KASSERT((label & SFXGE_MAGIC_DMAQ_LABEL_MASK) == label,
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("(label & SFXGE_MAGIC_DMAQ_LABEL_MASK) != label"));
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magic = SFXGE_MAGIC_TX_QFLUSH_DONE | label;
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KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
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("evq not started"));
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efx_ev_qpost(evq->common, magic);
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_software(void *arg, uint16_t magic)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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unsigned int label;
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evq = (struct sfxge_evq *)arg;
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sc = evq->sc;
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label = magic & SFXGE_MAGIC_DMAQ_LABEL_MASK;
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magic &= ~SFXGE_MAGIC_DMAQ_LABEL_MASK;
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switch (magic) {
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case SFXGE_MAGIC_RX_QFLUSH_DONE: {
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struct sfxge_rxq *rxq = sc->rxq[label];
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KASSERT(rxq != NULL, ("rxq == NULL"));
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KASSERT(evq->index == rxq->index,
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("evq->index != rxq->index"));
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sfxge_rx_qflush_done(rxq);
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break;
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}
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case SFXGE_MAGIC_RX_QFLUSH_FAILED: {
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struct sfxge_rxq *rxq = sc->rxq[label];
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KASSERT(rxq != NULL, ("rxq == NULL"));
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KASSERT(evq->index == rxq->index,
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("evq->index != rxq->index"));
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sfxge_rx_qflush_failed(rxq);
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break;
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}
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case SFXGE_MAGIC_RX_QREFILL: {
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struct sfxge_rxq *rxq = sc->rxq[label];
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KASSERT(rxq != NULL, ("rxq == NULL"));
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KASSERT(evq->index == rxq->index,
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("evq->index != rxq->index"));
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sfxge_rx_qrefill(rxq);
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break;
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}
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case SFXGE_MAGIC_TX_QFLUSH_DONE: {
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struct sfxge_txq *txq = sc->txq[label];
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KASSERT(txq != NULL, ("txq == NULL"));
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KASSERT(evq->index == txq->evq_index,
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("evq->index != txq->evq_index"));
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sfxge_tx_qflush_done(txq);
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break;
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}
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default:
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break;
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}
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_sram(void *arg, uint32_t code)
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{
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(void)arg;
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(void)code;
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switch (code) {
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case EFX_SRAM_UPDATE:
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EFSYS_PROBE(sram_update);
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break;
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case EFX_SRAM_CLEAR:
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EFSYS_PROBE(sram_clear);
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break;
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case EFX_SRAM_ILLEGAL_CLEAR:
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EFSYS_PROBE(sram_illegal_clear);
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break;
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default:
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KASSERT(B_FALSE, ("Impossible SRAM event"));
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break;
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}
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_timer(void *arg, uint32_t index)
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{
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(void)arg;
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(void)index;
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return (B_FALSE);
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}
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static boolean_t
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sfxge_ev_wake_up(void *arg, uint32_t index)
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{
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(void)arg;
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(void)index;
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return (B_FALSE);
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}
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static void
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sfxge_ev_stat_update(struct sfxge_softc *sc)
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{
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struct sfxge_evq *evq;
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unsigned int index;
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clock_t now;
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sx_xlock(&sc->softc_lock);
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if (sc->evq[0]->init_state != SFXGE_EVQ_STARTED)
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goto out;
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now = ticks;
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if (now - sc->ev_stats_update_time < hz)
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goto out;
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sc->ev_stats_update_time = now;
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/* Add event counts from each event queue in turn */
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for (index = 0; index < sc->intr.n_alloc; index++) {
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evq = sc->evq[index];
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mtx_lock(&evq->lock);
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efx_ev_qstats_update(evq->common, sc->ev_stats);
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mtx_unlock(&evq->lock);
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}
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out:
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sx_xunlock(&sc->softc_lock);
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}
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static int
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sfxge_ev_stat_handler(SYSCTL_HANDLER_ARGS)
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{
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struct sfxge_softc *sc = arg1;
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unsigned int id = arg2;
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sfxge_ev_stat_update(sc);
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return SYSCTL_OUT(req, &sc->ev_stats[id], sizeof(sc->ev_stats[id]));
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}
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static void
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sfxge_ev_stat_init(struct sfxge_softc *sc)
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{
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struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
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struct sysctl_oid_list *stat_list;
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unsigned int id;
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char name[40];
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stat_list = SYSCTL_CHILDREN(sc->stats_node);
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for (id = 0; id < EV_NQSTATS; id++) {
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snprintf(name, sizeof(name), "ev_%s",
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efx_ev_qstat_name(sc->enp, id));
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SYSCTL_ADD_PROC(
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ctx, stat_list,
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OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD,
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sc, id, sfxge_ev_stat_handler, "Q",
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"");
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}
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}
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static void
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sfxge_ev_qmoderate(struct sfxge_softc *sc, unsigned int idx, unsigned int us)
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{
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struct sfxge_evq *evq;
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efx_evq_t *eep;
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evq = sc->evq[idx];
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eep = evq->common;
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KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
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("evq->init_state != SFXGE_EVQ_STARTED"));
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(void)efx_ev_qmoderate(eep, us);
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}
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static int
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sfxge_int_mod_handler(SYSCTL_HANDLER_ARGS)
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{
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struct sfxge_softc *sc = arg1;
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struct sfxge_intr *intr = &sc->intr;
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unsigned int moderation;
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int error;
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int index;
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sx_xlock(&sc->softc_lock);
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if (req->newptr) {
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if ((error = SYSCTL_IN(req, &moderation, sizeof(moderation)))
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!= 0)
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goto out;
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/* We may not be calling efx_ev_qmoderate() now,
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* so we have to range-check the value ourselves.
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*/
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if (moderation >
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efx_nic_cfg_get(sc->enp)->enc_evq_moderation_max) {
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error = EINVAL;
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goto out;
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}
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sc->ev_moderation = moderation;
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if (intr->state == SFXGE_INTR_STARTED) {
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for (index = 0; index < intr->n_alloc; index++)
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sfxge_ev_qmoderate(sc, index, moderation);
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}
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} else {
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error = SYSCTL_OUT(req, &sc->ev_moderation,
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sizeof(sc->ev_moderation));
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}
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out:
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sx_xunlock(&sc->softc_lock);
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return error;
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}
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static boolean_t
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sfxge_ev_initialized(void *arg)
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{
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struct sfxge_evq *evq;
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evq = (struct sfxge_evq *)arg;
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KASSERT(evq->init_state == SFXGE_EVQ_STARTING,
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("evq not starting"));
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evq->init_state = SFXGE_EVQ_STARTED;
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return (0);
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}
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static boolean_t
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sfxge_ev_link_change(void *arg, efx_link_mode_t link_mode)
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{
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struct sfxge_evq *evq;
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struct sfxge_softc *sc;
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|
|
|
evq = (struct sfxge_evq *)arg;
|
|
sc = evq->sc;
|
|
|
|
sfxge_mac_link_update(sc, link_mode);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static const efx_ev_callbacks_t sfxge_ev_callbacks = {
|
|
.eec_initialized = sfxge_ev_initialized,
|
|
.eec_rx = sfxge_ev_rx,
|
|
.eec_tx = sfxge_ev_tx,
|
|
.eec_exception = sfxge_ev_exception,
|
|
.eec_rxq_flush_done = sfxge_ev_rxq_flush_done,
|
|
.eec_rxq_flush_failed = sfxge_ev_rxq_flush_failed,
|
|
.eec_txq_flush_done = sfxge_ev_txq_flush_done,
|
|
.eec_software = sfxge_ev_software,
|
|
.eec_sram = sfxge_ev_sram,
|
|
.eec_wake_up = sfxge_ev_wake_up,
|
|
.eec_timer = sfxge_ev_timer,
|
|
.eec_link_change = sfxge_ev_link_change,
|
|
};
|
|
|
|
|
|
int
|
|
sfxge_ev_qpoll(struct sfxge_softc *sc, unsigned int index)
|
|
{
|
|
struct sfxge_evq *evq;
|
|
int rc;
|
|
|
|
evq = sc->evq[index];
|
|
|
|
mtx_lock(&evq->lock);
|
|
|
|
if (evq->init_state != SFXGE_EVQ_STARTING &&
|
|
evq->init_state != SFXGE_EVQ_STARTED) {
|
|
rc = EINVAL;
|
|
goto fail;
|
|
}
|
|
|
|
/* Synchronize the DMA memory for reading */
|
|
bus_dmamap_sync(evq->mem.esm_tag, evq->mem.esm_map,
|
|
BUS_DMASYNC_POSTREAD);
|
|
|
|
KASSERT(evq->rx_done == 0, ("evq->rx_done != 0"));
|
|
KASSERT(evq->tx_done == 0, ("evq->tx_done != 0"));
|
|
KASSERT(evq->txq == NULL, ("evq->txq != NULL"));
|
|
KASSERT(evq->txqs == &evq->txq, ("evq->txqs != &evq->txq"));
|
|
|
|
/* Poll the queue */
|
|
efx_ev_qpoll(evq->common, &evq->read_ptr, &sfxge_ev_callbacks, evq);
|
|
|
|
evq->rx_done = 0;
|
|
evq->tx_done = 0;
|
|
|
|
/* Perform any pending completion processing */
|
|
sfxge_ev_qcomplete(evq, B_TRUE);
|
|
|
|
/* Re-prime the event queue for interrupts */
|
|
if ((rc = efx_ev_qprime(evq->common, evq->read_ptr)) != 0)
|
|
goto fail;
|
|
|
|
mtx_unlock(&evq->lock);
|
|
|
|
return (0);
|
|
|
|
fail:
|
|
mtx_unlock(&(evq->lock));
|
|
return (rc);
|
|
}
|
|
|
|
static void
|
|
sfxge_ev_qstop(struct sfxge_softc *sc, unsigned int index)
|
|
{
|
|
struct sfxge_evq *evq;
|
|
|
|
evq = sc->evq[index];
|
|
|
|
KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
|
|
("evq->init_state != SFXGE_EVQ_STARTED"));
|
|
|
|
mtx_lock(&evq->lock);
|
|
evq->init_state = SFXGE_EVQ_INITIALIZED;
|
|
evq->read_ptr = 0;
|
|
evq->exception = B_FALSE;
|
|
|
|
/* Add event counts before discarding the common evq state */
|
|
efx_ev_qstats_update(evq->common, sc->ev_stats);
|
|
|
|
efx_ev_qdestroy(evq->common);
|
|
efx_sram_buf_tbl_clear(sc->enp, evq->buf_base_id,
|
|
EFX_EVQ_NBUFS(SFXGE_NEVS));
|
|
mtx_unlock(&evq->lock);
|
|
}
|
|
|
|
static int
|
|
sfxge_ev_qstart(struct sfxge_softc *sc, unsigned int index)
|
|
{
|
|
struct sfxge_evq *evq;
|
|
efsys_mem_t *esmp;
|
|
int count;
|
|
int rc;
|
|
|
|
evq = sc->evq[index];
|
|
esmp = &evq->mem;
|
|
|
|
KASSERT(evq->init_state == SFXGE_EVQ_INITIALIZED,
|
|
("evq->init_state != SFXGE_EVQ_INITIALIZED"));
|
|
|
|
/* Clear all events. */
|
|
(void)memset(esmp->esm_base, 0xff, EFX_EVQ_SIZE(SFXGE_NEVS));
|
|
|
|
/* Program the buffer table. */
|
|
if ((rc = efx_sram_buf_tbl_set(sc->enp, evq->buf_base_id, esmp,
|
|
EFX_EVQ_NBUFS(SFXGE_NEVS))) != 0)
|
|
return rc;
|
|
|
|
/* Create the common code event queue. */
|
|
if ((rc = efx_ev_qcreate(sc->enp, index, esmp, SFXGE_NEVS,
|
|
evq->buf_base_id, &evq->common)) != 0)
|
|
goto fail;
|
|
|
|
mtx_lock(&evq->lock);
|
|
|
|
/* Set the default moderation */
|
|
(void)efx_ev_qmoderate(evq->common, sc->ev_moderation);
|
|
|
|
/* Prime the event queue for interrupts */
|
|
if ((rc = efx_ev_qprime(evq->common, evq->read_ptr)) != 0)
|
|
goto fail2;
|
|
|
|
evq->init_state = SFXGE_EVQ_STARTING;
|
|
|
|
mtx_unlock(&evq->lock);
|
|
|
|
/* Wait for the initialization event */
|
|
count = 0;
|
|
do {
|
|
/* Pause for 100 ms */
|
|
pause("sfxge evq init", hz / 10);
|
|
|
|
/* Check to see if the test event has been processed */
|
|
if (evq->init_state == SFXGE_EVQ_STARTED)
|
|
goto done;
|
|
|
|
} while (++count < 20);
|
|
|
|
rc = ETIMEDOUT;
|
|
goto fail3;
|
|
|
|
done:
|
|
return (0);
|
|
|
|
fail3:
|
|
mtx_lock(&evq->lock);
|
|
evq->init_state = SFXGE_EVQ_INITIALIZED;
|
|
fail2:
|
|
mtx_unlock(&evq->lock);
|
|
efx_ev_qdestroy(evq->common);
|
|
fail:
|
|
efx_sram_buf_tbl_clear(sc->enp, evq->buf_base_id,
|
|
EFX_EVQ_NBUFS(SFXGE_NEVS));
|
|
|
|
return (rc);
|
|
}
|
|
|
|
void
|
|
sfxge_ev_stop(struct sfxge_softc *sc)
|
|
{
|
|
struct sfxge_intr *intr;
|
|
efx_nic_t *enp;
|
|
int index;
|
|
|
|
intr = &sc->intr;
|
|
enp = sc->enp;
|
|
|
|
KASSERT(intr->state == SFXGE_INTR_STARTED,
|
|
("Interrupts not started"));
|
|
|
|
/* Stop the event queue(s) */
|
|
index = intr->n_alloc;
|
|
while (--index >= 0)
|
|
sfxge_ev_qstop(sc, index);
|
|
|
|
/* Tear down the event module */
|
|
efx_ev_fini(enp);
|
|
}
|
|
|
|
int
|
|
sfxge_ev_start(struct sfxge_softc *sc)
|
|
{
|
|
struct sfxge_intr *intr;
|
|
int index;
|
|
int rc;
|
|
|
|
intr = &sc->intr;
|
|
|
|
KASSERT(intr->state == SFXGE_INTR_STARTED,
|
|
("intr->state != SFXGE_INTR_STARTED"));
|
|
|
|
/* Initialize the event module */
|
|
if ((rc = efx_ev_init(sc->enp)) != 0)
|
|
return rc;
|
|
|
|
/* Start the event queues */
|
|
for (index = 0; index < intr->n_alloc; index++) {
|
|
if ((rc = sfxge_ev_qstart(sc, index)) != 0)
|
|
goto fail;
|
|
}
|
|
|
|
return (0);
|
|
|
|
fail:
|
|
/* Stop the event queue(s) */
|
|
while (--index >= 0)
|
|
sfxge_ev_qstop(sc, index);
|
|
|
|
/* Tear down the event module */
|
|
efx_ev_fini(sc->enp);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
static void
|
|
sfxge_ev_qfini(struct sfxge_softc *sc, unsigned int index)
|
|
{
|
|
struct sfxge_evq *evq;
|
|
|
|
evq = sc->evq[index];
|
|
|
|
KASSERT(evq->init_state == SFXGE_EVQ_INITIALIZED,
|
|
("evq->init_state != SFXGE_EVQ_INITIALIZED"));
|
|
KASSERT(evq->txqs == &evq->txq, ("evq->txqs != &evq->txq"));
|
|
|
|
sfxge_dma_free(&evq->mem);
|
|
|
|
sc->evq[index] = NULL;
|
|
|
|
mtx_destroy(&evq->lock);
|
|
|
|
free(evq, M_SFXGE);
|
|
}
|
|
|
|
static int
|
|
sfxge_ev_qinit(struct sfxge_softc *sc, unsigned int index)
|
|
{
|
|
struct sfxge_evq *evq;
|
|
efsys_mem_t *esmp;
|
|
int rc;
|
|
|
|
KASSERT(index < SFXGE_RX_SCALE_MAX, ("index >= SFXGE_RX_SCALE_MAX"));
|
|
|
|
evq = malloc(sizeof(struct sfxge_evq), M_SFXGE, M_ZERO | M_WAITOK);
|
|
evq->sc = sc;
|
|
evq->index = index;
|
|
sc->evq[index] = evq;
|
|
esmp = &evq->mem;
|
|
|
|
/* Initialise TX completion list */
|
|
evq->txqs = &evq->txq;
|
|
|
|
/* Allocate DMA space. */
|
|
if ((rc = sfxge_dma_alloc(sc, EFX_EVQ_SIZE(SFXGE_NEVS), esmp)) != 0)
|
|
return (rc);
|
|
|
|
/* Allocate buffer table entries. */
|
|
sfxge_sram_buf_tbl_alloc(sc, EFX_EVQ_NBUFS(SFXGE_NEVS),
|
|
&evq->buf_base_id);
|
|
|
|
mtx_init(&evq->lock, "evq", NULL, MTX_DEF);
|
|
|
|
evq->init_state = SFXGE_EVQ_INITIALIZED;
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
sfxge_ev_fini(struct sfxge_softc *sc)
|
|
{
|
|
struct sfxge_intr *intr;
|
|
int index;
|
|
|
|
intr = &sc->intr;
|
|
|
|
KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
|
|
("intr->state != SFXGE_INTR_INITIALIZED"));
|
|
|
|
sc->ev_moderation = 0;
|
|
|
|
/* Tear down the event queue(s). */
|
|
index = intr->n_alloc;
|
|
while (--index >= 0)
|
|
sfxge_ev_qfini(sc, index);
|
|
}
|
|
|
|
int
|
|
sfxge_ev_init(struct sfxge_softc *sc)
|
|
{
|
|
struct sysctl_ctx_list *sysctl_ctx = device_get_sysctl_ctx(sc->dev);
|
|
struct sysctl_oid *sysctl_tree = device_get_sysctl_tree(sc->dev);
|
|
struct sfxge_intr *intr;
|
|
int index;
|
|
int rc;
|
|
|
|
intr = &sc->intr;
|
|
|
|
KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
|
|
("intr->state != SFXGE_INTR_INITIALIZED"));
|
|
|
|
/* Set default interrupt moderation; add a sysctl to
|
|
* read and change it.
|
|
*/
|
|
sc->ev_moderation = 30;
|
|
SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
|
|
OID_AUTO, "int_mod", CTLTYPE_UINT|CTLFLAG_RW,
|
|
sc, 0, sfxge_int_mod_handler, "IU",
|
|
"sfxge interrupt moderation (us)");
|
|
|
|
/*
|
|
* Initialize the event queue(s) - one per interrupt.
|
|
*/
|
|
for (index = 0; index < intr->n_alloc; index++) {
|
|
if ((rc = sfxge_ev_qinit(sc, index)) != 0)
|
|
goto fail;
|
|
}
|
|
|
|
sfxge_ev_stat_init(sc);
|
|
|
|
return (0);
|
|
|
|
fail:
|
|
while (--index >= 0)
|
|
sfxge_ev_qfini(sc, index);
|
|
|
|
return (rc);
|
|
}
|