ed08bbe6a2
band aid until a better solution to find the correct interrupt controller can be found. While here fix one place in the GICv3 ITS driver where the offset wasn't correctly applied. Sponsored by: DARPA, AFRL Sponsored by: Cavium (Hardware)
331 lines
8.6 KiB
C
331 lines
8.6 KiB
C
/*-
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* Copyright (c) 2014 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Semihalf under
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* the sponsorship of the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* Generic ECAM PCIe driver */
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/cpuset.h>
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#include <sys/rwlock.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <dev/acpica/acpivar.h>
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#include <dev/acpica/acpi_pcibvar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcib_private.h>
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#include <dev/pci/pci_host_generic.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include "pcib_if.h"
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int pci_host_generic_acpi_attach(device_t);
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/* Assembling ECAM Configuration Address */
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#define PCIE_BUS_SHIFT 20
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#define PCIE_SLOT_SHIFT 15
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#define PCIE_FUNC_SHIFT 12
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#define PCIE_BUS_MASK 0xFF
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#define PCIE_SLOT_MASK 0x1F
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#define PCIE_FUNC_MASK 0x07
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#define PCIE_REG_MASK 0xFFF
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#define PCIE_ADDR_OFFSET(bus, slot, func, reg) \
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((((bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT) | \
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(((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT) | \
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(((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT) | \
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((reg) & PCIE_REG_MASK))
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#define PCI_IO_WINDOW_OFFSET 0x1000
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#define SPACE_CODE_SHIFT 24
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#define SPACE_CODE_MASK 0x3
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#define SPACE_CODE_IO_SPACE 0x1
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#define PROPS_CELL_SIZE 1
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#define PCI_ADDR_CELL_SIZE 2
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struct generic_pcie_acpi_softc {
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struct generic_pcie_core_softc base;
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ACPI_BUFFER ap_prt; /* interrupt routing table */
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};
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/* Forward prototypes */
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static int generic_pcie_acpi_probe(device_t dev);
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static uint32_t generic_pcie_read_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, int bytes);
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static void generic_pcie_write_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, uint32_t val, int bytes);
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static int generic_pcie_release_resource(device_t dev, device_t child,
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int type, int rid, struct resource *res);
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static int
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generic_pcie_acpi_probe(device_t dev)
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{
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ACPI_DEVICE_INFO *devinfo;
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ACPI_HANDLE h;
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int root;
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if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
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ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
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return (ENXIO);
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root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
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AcpiOsFree(devinfo);
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if (!root)
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return (ENXIO);
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device_set_desc(dev, "Generic PCI host controller");
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return (BUS_PROBE_GENERIC);
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}
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int
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pci_host_generic_acpi_attach(device_t dev)
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{
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struct generic_pcie_acpi_softc *sc;
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ACPI_HANDLE handle;
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int error;
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sc = device_get_softc(dev);
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handle = acpi_get_handle(dev);
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if (ACPI_FAILURE(acpi_GetInteger(handle, "_CCA", &sc->base.coherent)))
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sc->base.coherent = 0;
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if (bootverbose)
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device_printf(dev, "Bus is%s cache-coherent\n",
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sc->base.coherent ? "" : " not");
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acpi_pcib_fetch_prt(dev, &sc->ap_prt);
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error = pci_host_generic_core_attach(dev);
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if (error != 0)
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return (error);
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device_add_child(dev, "pci", -1);
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return (bus_generic_attach(dev));
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}
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static int
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generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin)
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{
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struct generic_pcie_acpi_softc *sc;
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sc = device_get_softc(bus);
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return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt));
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}
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static struct rman *
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generic_pcie_acpi_rman(struct generic_pcie_acpi_softc *sc, int type)
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{
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switch (type) {
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case SYS_RES_IOPORT:
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return (&sc->base.io_rman);
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case SYS_RES_MEMORY:
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return (&sc->base.mem_rman);
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default:
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break;
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}
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return (NULL);
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}
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static struct resource *
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pci_host_generic_acpi_alloc_resource(device_t dev, device_t child, int type,
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int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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struct generic_pcie_acpi_softc *sc;
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if (type == PCI_RES_BUS) {
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sc = device_get_softc(dev);
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return (pci_domain_alloc_bus(sc->base.ecam, child, rid, start,
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end, count, flags));
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}
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#endif
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return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
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count, flags));
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}
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static int
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generic_pcie_acpi_activate_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r)
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{
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struct generic_pcie_acpi_softc *sc;
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int res;
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sc = device_get_softc(dev);
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if ((res = rman_activate_resource(r)) != 0)
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return (res);
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res = BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid,r);
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return (res);
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}
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static int
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generic_pcie_acpi_deactivate_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r)
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{
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int res;
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if ((res = rman_deactivate_resource(r)) != 0)
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return (res);
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res = BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), child, type,
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rid, r);
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return (res);
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}
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static int
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generic_pcie_acpi_alloc_msi(device_t pci, device_t child, int count,
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int maxcount, int *irqs)
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{
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#if defined(INTRNG)
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return (intr_alloc_msi(pci, child, ACPI_MSI_XREF, count, maxcount,
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irqs));
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#else
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return (ENXIO);
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#endif
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}
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static int
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generic_pcie_acpi_release_msi(device_t pci, device_t child, int count,
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int *irqs)
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{
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#if defined(INTRNG)
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return (intr_release_msi(pci, child, ACPI_MSI_XREF, count, irqs));
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#else
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return (ENXIO);
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#endif
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}
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static int
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generic_pcie_acpi_map_msi(device_t pci, device_t child, int irq, uint64_t *addr,
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uint32_t *data)
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{
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#if defined(INTRNG)
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return (intr_map_msi(pci, child, ACPI_MSI_XREF, irq, addr, data));
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#else
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return (ENXIO);
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#endif
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}
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static int
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generic_pcie_acpi_alloc_msix(device_t pci, device_t child, int *irq)
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{
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#if defined(INTRNG)
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return (intr_alloc_msix(pci, child, ACPI_MSI_XREF, irq));
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#else
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return (ENXIO);
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#endif
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}
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static int
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generic_pcie_acpi_release_msix(device_t pci, device_t child, int irq)
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{
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#if defined(INTRNG)
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return (intr_release_msix(pci, child, ACPI_MSI_XREF, irq));
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#else
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return (ENXIO);
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#endif
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}
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static int
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generic_pcie_acpi_get_id(device_t pci, device_t child, enum pci_id_type type,
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uintptr_t *id)
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{
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struct generic_pcie_acpi_softc *sc;
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int err;
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/* Use the PCI RID to find the MSI ID */
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if (type == PCI_ID_MSI) {
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sc = device_get_softc(pci);
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type = PCI_ID_RID;
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err = pcib_get_id(pci, child, type, id);
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if (err != 0)
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return (err);
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*id |= sc->base.ecam << 16;
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return (0);
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}
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return (pcib_get_id(pci, child, type, id));
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}
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static device_method_t generic_pcie_acpi_methods[] = {
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DEVMETHOD(device_probe, generic_pcie_acpi_probe),
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DEVMETHOD(device_attach, pci_host_generic_acpi_attach),
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DEVMETHOD(bus_alloc_resource, pci_host_generic_acpi_alloc_resource),
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DEVMETHOD(bus_activate_resource, generic_pcie_acpi_activate_resource),
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DEVMETHOD(bus_deactivate_resource, generic_pcie_acpi_deactivate_resource),
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/* pcib interface */
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DEVMETHOD(pcib_route_interrupt, generic_pcie_acpi_route_interrupt),
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DEVMETHOD(pcib_alloc_msi, generic_pcie_acpi_alloc_msi),
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DEVMETHOD(pcib_release_msi, generic_pcie_acpi_release_msi),
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DEVMETHOD(pcib_alloc_msix, generic_pcie_acpi_alloc_msix),
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DEVMETHOD(pcib_release_msix, generic_pcie_acpi_release_msix),
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DEVMETHOD(pcib_map_msi, generic_pcie_acpi_map_msi),
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DEVMETHOD(pcib_get_id, generic_pcie_acpi_get_id),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(pcib, generic_pcie_acpi_driver, generic_pcie_acpi_methods,
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sizeof(struct generic_pcie_acpi_softc), generic_pcie_core_driver);
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static devclass_t generic_pcie_acpi_devclass;
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DRIVER_MODULE(pcib, acpi, generic_pcie_acpi_driver, generic_pcie_acpi_devclass,
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0, 0);
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