1226 lines
31 KiB
Groff
1226 lines
31 KiB
Groff
.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" This software is provided by Joseph Koshy ``as is'' and
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.\" any express or implied warranties, including, but not limited to, the
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.\" implied warranties of merchantability and fitness for a particular purpose
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.\" are disclaimed. in no event shall Joseph Koshy be liable
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.\" for any direct, indirect, incidental, special, exemplary, or consequential
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.\" damages (including, but not limited to, procurement of substitute goods
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.\" or services; loss of use, data, or profits; or business interruption)
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.\" however caused and on any theory of liability, whether in contract, strict
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.\" liability, or tort (including negligence or otherwise) arising in any way
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.\" out of the use of this software, even if advised of the possibility of
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.\" such damage.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd October 4, 2008
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.Dt PMC.P4 3
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.Os
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.Sh NAME
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.Nm pmc.p4
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.Nd measurement events for
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.Tn "Intel Pentium 4"
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and other
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.Tn Netburst
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architecture CPUs
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.Sh LIBRARY
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.Lb libpmc
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.Sh SYNOPSIS
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.In pmc.h
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.Sh DESCRIPTION
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Intel P4 PMCs are present in Intel
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.Tn "Pentium 4"
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and
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.Tn Xeon
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processors that use the
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.Tn Netburst
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CPU architecture.
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.Pp
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These PMCs are documented in
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.Rs
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.%B "IA-32 Intel(R) Architecture Software Developer's Manual"
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.%T "Volume 3: System Programming Guide"
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.%N "Order Number 245472-012"
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.%D 2003
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.%Q "Intel Corporation"
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.Re
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Further information about using these PMCs may be found in
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.Rs
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.%B "IA-32 Intel(R) Architecture Optimization Guide"
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.%D 2003
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.%N "Order Number 248966-009"
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.%Q "Intel Corporation"
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.Re
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Some of these events are affected by processor errata described in
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.Rs
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.%B "Intel(R) Pentium(R) 4 Processor Specification Update"
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.%N "Document Number: 249199-059"
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.%D "April 2005"
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.%Q "Intel Corporation"
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.Re
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.Ss PMC Features
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Intel Pentium 4 PMCs are 40 bits wide.
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Each CPU contains 18 PMCs, divided into 4 groups with 4, 4, 4 and 6
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PMCs respectively.
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On processors with hyperthreading support, PMC resources are shared
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between logical processors.
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These PMCs support the following capabilities:
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.Bl -column "PMC_CAP_INTERRUPT" "Support"
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.It Em Capability Ta Em Support
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.It PMC_CAP_CASCADE Ta Yes
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.It PMC_CAP_EDGE Ta Yes
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.It PMC_CAP_INTERRUPT Ta Yes
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.It PMC_CAP_INVERT Ta Yes
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.It PMC_CAP_READ Ta Yes
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.It PMC_CAP_PRECISE Ta Unimplemented
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.It PMC_CAP_SYSTEM Ta Yes
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.It PMC_CAP_TAGGING Ta Yes
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.It PMC_CAP_THRESHOLD Ta Yes
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.It PMC_CAP_USER Ta Yes
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.It PMC_CAP_WRITE Ta Yes
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.El
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.Ss Event Qualifiers
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.Pp
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Event specifiers for Intel P4 PMCs can have the following common
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qualifiers:
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.Bl -tag -width indent
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.It Li active= Ns Ar choice
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(On P4 HTT CPUs) Filter event counting based on which logical
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processors are active.
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The allowed values of
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.Ar choice
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are:
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.Pp
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.Bl -tag -width indent -compact
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.It Li any
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Count when either logical processor is active.
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.It Li both
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Count when both logical processors are active.
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.It Li none
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Count only when neither logical processor is active.
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.It Li single
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Count only when one logical processor is active.
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.El
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.Pp
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The default is
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.Dq Li both .
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.It Li cascade
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Configure the PMC to cascade onto its partner.
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See
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.Sx "Cascading P4 PMCs"
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below for more information.
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.It Li edge
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Configure the counter to count false to true transitions of the threshold
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comparison output.
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This qualifier only takes effect if a threshold qualifier has also been
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specified.
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.It Li complement
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Configure the counter to increment only when the event count seen is
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less than the threshold qualifier value specified.
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.It Li mask= Ns Ar qualifier
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Many event specifiers for Intel P4 PMCs need to be additionally
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qualified using a mask qualifier.
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The allowed syntax for these qualifiers is event specific and is
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described along with the events.
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.It Li os
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Configure the PMC to count when the CPL of the processor is 0.
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.It Li precise
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Select precise event based sampling.
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Precise sampling is supported by the hardware for a limited set of
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events.
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.It Li tag= Ns Ar value
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Configure the PMC to tag the internal uop selected by the other
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fields in this event specifier with value
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.Ar value .
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This feature is used when cascading PMCs.
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.It Li threshold= Ns Ar value
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Configure the PMC to increment only when the event counts seen are
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greater than the specified threshold value
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.Ar value .
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.It Li usr
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Configure the PMC to count when the CPL of the processor is 1, 2 or 3.
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.El
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.Pp
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If neither of the
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.Dq Li os
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or
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.Dq Li usr
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qualifiers are specified, the default is to enable both.
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.Pp
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On Intel Pentium 4 processors with HTT, events are
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divided into two classes:
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.Pp
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.Bl -tag -width indent -compact
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.It "TS Events"
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are those where hardware can differentiate between events
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generated on one logical processor from those generated on the
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other.
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.It "TI Events"
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are those where hardware cannot differentiate between events
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generated by multiple logical processors in a package.
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.El
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.Pp
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Only TS events are allowed for use with process-mode PMCs on
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Pentium-4/HTT CPUs.
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.Pp
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The event specifiers supported by Intel P4 PMCs are:
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.Bl -tag -width indent
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.It Li p4-128bit-mmx-uop Op Li ,mask= Ns Ar flags
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.Pq "TI event"
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Count integer SIMD SSE2 instructions that operate on 128 bit SIMD
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operands.
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Qualifier
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.Ar flags
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can take the following value (which is also the default):
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.Pp
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.Bl -tag -width indent -compact
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.It Li all
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Count all uops operating on 128 bit SIMD integer operands in memory or
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XMM register.
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.El
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.Pp
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If an instruction contains more than one 128 bit MMX uop, then each
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uop will be counted.
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.It Li p4-64bit-mmx-uop Op Li ,mask= Ns Ar flags
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.Pq "TI event"
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Count MMX instructions that operate on 64 bit SIMD operands.
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Qualifier
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.Ar flags
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can take the following value (which is also the default):
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.Pp
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.Bl -tag -width indent -compact
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.It Li all
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Count all uops operating on 64 bit SIMD integer operands in memory or
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in MMX registers.
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.El
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.Pp
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If an instruction contains more than one 64 bit MMX uop, then each
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uop will be counted.
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.It Li p4-b2b-cycles
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.Pq "TI event"
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Count back-to-back bus cycles.
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Further documentation for this event is unavailable.
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.It Li p4-bnr
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.Pq "TI event"
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Count bus-not-ready conditions.
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Further documentation for this event is unavailable.
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.It Li p4-bpu-fetch-request Op Li ,mask= Ns Ar qualifier
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.Pq "TS event"
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Count instruction fetch requests qualified by additional
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flags specified in
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.Ar qualifier .
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At this point only one flag is supported:
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.Pp
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.Bl -tag -width indent -compact
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.It Li tcmiss
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Count trace cache lookup misses.
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.El
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.Pp
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The default qualifier is also
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.Dq Li mask=tcmiss .
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.It Li p4-branch-retired Op Li ,mask= Ns Ar flags
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.Pq "TS event"
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Counts retired branches.
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Qualifier
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.Ar flags
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is a list of the following
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.Ql +
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separated strings:
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.Pp
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.Bl -tag -width indent -compact
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.It Li mmnp
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Count branches not-taken and predicted.
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.It Li mmnm
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Count branches not-taken and mis-predicted.
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.It Li mmtp
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Count branches taken and predicted.
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.It Li mmtm
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Count branches taken and mis-predicted.
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.El
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.Pp
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The default qualifier counts all four kinds of branches.
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.It Li p4-bsq-active-entries Op Li ,mask= Ns Ar qualifier
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.Pq "TS event"
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Count the number of entries (clipped at 15) currently active in the
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BSQ.
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Qualifier
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.Ar qualifier
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is a
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.Ql +
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separated set of the following flags:
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.Pp
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.Bl -tag -width indent -compact
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.It Li req-type0 , Li req-type1
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Forms a 2-bit number used to select the request type encoding:
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.Pp
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.Bl -tag -width indent -compact
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.It Li 0
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reads excluding read invalidate
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.It Li 1
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read invalidates
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.It Li 2
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writes other than writebacks
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.It Li 3
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writebacks
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.El
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.Pp
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Bit
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.Dq Li req-type1
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is the MSB for this two bit number.
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.It Li req-len0 , Li req-len1
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Forms a two-bit number that specifies the request length encoding:
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.Pp
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.Bl -tag -width indent -compact
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.It Li 0
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0 chunks
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.It Li 1
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1 chunk
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.It Li 3
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8 chunks
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.El
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.Pp
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Bit
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.Dq Li req-len1
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is the MSB for this two bit number.
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.It Li req-io-type
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Count requests that are input or output requests.
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.It Li req-lock-type
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Count requests that lock the bus.
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.It Li req-lock-cache
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Count requests that lock the cache.
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.It Li req-split-type
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Count requests that is a bus 8-byte chunk that is split across an
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8-byte boundary.
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.It Li req-dem-type
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Count requests that are demand (not prefetches) if set.
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Count requests that are prefetches if not set.
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.It Li req-ord-type
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Count requests that are ordered.
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.It Li mem-type0 , Li mem-type1 , Li mem-type2
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Forms a 3-bit number that specifies a memory type encoding:
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.Pp
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.Bl -tag -width indent -compact
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.It Li 0
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UC
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.It Li 1
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USWC
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.It Li 4
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WT
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.It Li 5
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WP
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.It Li 6
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WB
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.El
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.Pp
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Bit
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.Dq Li mem-type2
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is the MSB of this 3-bit number.
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.El
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.Pp
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The default qualifier has all the above bits set.
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.Pp
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Edge triggering using the
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.Dq Li edge
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qualifier should not be used with this event when counting cycles.
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.It Li p4-bsq-allocation Op Li ,mask= Ns Ar qualifier
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.Pq "TS event"
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Count allocations in the bus sequence unit according to the flags
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specified in
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.Ar qualifier ,
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which is a
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.Ql +
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separated set of the following flags:
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.Pp
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.Bl -tag -width indent -compact
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.It Li req-type0 , Li req-type1
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Forms a 2-bit number used to select the request type encoding:
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.Pp
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.Bl -tag -width indent -compact
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.It Li 0
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reads excluding read invalidate
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.It Li 1
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read invalidates
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.It Li 2
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writes other than writebacks
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.It Li 3
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writebacks
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.El
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.Pp
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Bit
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.Dq Li req-type1
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is the MSB for this two bit number.
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.It Li req-len0 , Li req-len1
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Forms a two-bit number that specifies the request length encoding:
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.Pp
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.Bl -tag -width indent -compact
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.It Li 0
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0 chunks
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.It Li 1
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1 chunk
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.It Li 3
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8 chunks
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.El
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.Pp
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Bit
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.Dq Li req-len1
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is the MSB for this two bit number.
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.It Li req-io-type
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Count requests that are input or output requests.
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.It Li req-lock-type
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Count requests that lock the bus.
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.It Li req-lock-cache
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Count requests that lock the cache.
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.It Li req-split-type
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Count requests that is a bus 8-byte chunk that is split across an
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8-byte boundary.
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.It Li req-dem-type
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Count requests that are demand (not prefetches) if set.
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Count requests that are prefetches if not set.
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.It Li req-ord-type
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Count requests that are ordered.
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.It Li mem-type0 , Li mem-type1 , Li mem-type2
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Forms a 3-bit number that specifies a memory type encoding:
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.Pp
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.Bl -tag -width indent -compact
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.It Li 0
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UC
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.It Li 1
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USWC
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.It Li 4
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WT
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.It Li 5
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WP
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.It Li 6
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WB
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.El
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.Pp
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Bit
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.Dq Li mem-type2
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is the MSB of this 3-bit number.
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.El
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.Pp
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The default qualifier has all the above bits set.
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.Pp
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This event is usually used along with the
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.Dq Li edge
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qualifier to avoid multiple counting.
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.It Li p4-bsq-cache-reference Op Li ,mask= Ns Ar qualifier
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.Pq "TS event"
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Count cache references as seen by the bus unit (2nd or 3rd level
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cache references).
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Qualifier
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.Ar qualifier
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is a
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.Ql +
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separated list of the following keywords:
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.Pp
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.Bl -tag -width indent -compact
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.It Li rd-2ndl-hits
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|
Count 2nd level cache hits in the shared state.
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.It Li rd-2ndl-hite
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Count 2nd level cache hits in the exclusive state.
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.It Li rd-2ndl-hitm
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Count 2nd level cache hits in the modified state.
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.It Li rd-3rdl-hits
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Count 3rd level cache hits in the shared state.
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.It Li rd-3rdl-hite
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Count 3rd level cache hits in the exclusive state.
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.It Li rd-3rdl-hitm
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Count 3rd level cache hits in the modified state.
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.It Li rd-2ndl-miss
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Count 2nd level cache misses.
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|
.It Li rd-3rdl-miss
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|
Count 3rd level cache misses.
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|
.It Li wr-2ndl-miss
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|
Count write-back lookups from the data access cache that miss the 2nd
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level cache.
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.El
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.Pp
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The default is to count all the above events.
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.It Li p4-execution-event Op Li ,mask= Ns Ar flags
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.Pq "TS event"
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Count the retirement of tagged uops selected through the execution
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tagging mechanism.
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Qualifier
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.Ar flags
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can contain the following strings separated by
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.Ql +
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characters:
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.Pp
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.Bl -tag -width indent -compact
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.It Li nbogus0 , Li nbogus1 , Li nbogus2 , Li nbogus3
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The marked uops are not bogus.
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.It Li bogus0 , Li bogus1 , Li bogus2 , Li bogus3
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The marked uops are bogus.
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.El
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.Pp
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This event requires additional (upstream) events to be allocated to
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perform the desired uop tagging.
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The default is to set all the above flags.
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This event can be used for precise event based sampling.
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|
.It Li p4-front-end-event Op Li ,mask= Ns Ar flags
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.Pq "TS event"
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|
Count the retirement of tagged uops selected through the front-end
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|
tagging mechanism.
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|
Qualifier
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|
.Ar flags
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|
can contain the following strings separated by
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.Ql +
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|
characters:
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|
.Pp
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.Bl -tag -width indent -compact
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|
.It Li nbogus
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|
The marked uops are not bogus.
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|
.It Li bogus
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|
The marked uops are bogus.
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.El
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.Pp
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|
This event requires additional (upstream) events to be allocated to
|
|
perform the desired uop tagging.
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|
The default is to select both kinds of events.
|
|
This event can be used for precise event based sampling.
|
|
.It Li p4-fsb-data-activity Op Li ,mask= Ns Ar flags
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|
.Pq "TI event"
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|
Count each DBSY or DRDY event selected by qualifier
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|
.Ar flags .
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|
Qualifier
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.Ar flags
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|
is a
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.Ql +
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|
separated set of the following flags:
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|
.Pp
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.Bl -tag -width indent -compact
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|
.It Li drdy-drv
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|
Count when this processor is driving data onto the bus.
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|
.It Li drdy-own
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|
Count when this processor is reading data from the bus.
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|
.It Li drdy-other
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|
Count when data is on the bus but not being sampled by this processor.
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|
.It Li dbsy-drv
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|
Count when this processor reserves the bus for use in the next cycle
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|
in order to drive data.
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|
.It Li dbsy-own
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|
Count when some agent reserves the bus for use in the next bus cycle
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|
to drive data that this processor will sample.
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|
.It Li dbsy-other
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|
Count when some agent reserves the bus for use in the next bus cycle
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|
to drive data that this processor will not sample.
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|
.El
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|
.Pp
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|
Flags
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|
.Dq Li drdy-own
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|
and
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|
.Dq Li drdy-other
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|
are mutually exclusive.
|
|
Flags
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|
.Dq Li dbsy-own
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|
and
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|
.Dq Li dbsy-other
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|
are mutually exclusive.
|
|
The default value for
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|
.Ar qualifier
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|
is
|
|
.Dq Li drdy-drv+drdy-own+dbsy-drv+dbsy-own .
|
|
.It Li p4-global-power-events Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count cycles during which the processor is not stopped.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li running
|
|
Count cycles when the processor is active.
|
|
.El
|
|
.Pp
|
|
.It Li p4-instr-retired Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count instructions retired during a clock cycle.
|
|
Qualifier
|
|
.Ar flags
|
|
comprises of the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li nbogusntag
|
|
Count non-bogus instructions that are not tagged.
|
|
.It Li nbogustag
|
|
Count non-bogus instructions that are tagged.
|
|
.It Li bogusntag
|
|
Count bogus instructions that are not tagged.
|
|
.It Li bogustag
|
|
Count bogus instructions that are tagged.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts all the above kinds of instructions.
|
|
.It Li p4-ioq-active-entries Xo
|
|
.Op Li ,mask= Ns Ar qualifier
|
|
.Op Li ,busreqtype= Ns Ar req-type
|
|
.Xc
|
|
.Pq "TS event"
|
|
Count the number of entries (clipped at 15) in the IOQ that are
|
|
active.
|
|
The event masks are specified by qualifier
|
|
.Ar qualifier
|
|
and
|
|
.Ar req-type .
|
|
.Pp
|
|
Qualifier
|
|
.Ar qualifier
|
|
is a
|
|
.Ql +
|
|
separated set of the following flags:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all-read
|
|
Count read entries.
|
|
.It Li all-write
|
|
Count write entries.
|
|
.It Li mem-uc
|
|
Count entries accessing un-cacheable memory.
|
|
.It Li mem-wc
|
|
Count entries accessing write-combining memory.
|
|
.It Li mem-wt
|
|
Count entries accessing write-through memory.
|
|
.It Li mem-wp
|
|
Count entries accessing write-protected memory
|
|
.It Li mem-wb
|
|
Count entries accessing write-back memory.
|
|
.It Li own
|
|
Count store requests driven by the processor (i.e., not by other
|
|
processors or by DMA).
|
|
.It Li other
|
|
Count store requests driven by other processors or by DMA.
|
|
.It Li prefetch
|
|
Include hardware and software prefetch requests in the count.
|
|
.El
|
|
.Pp
|
|
The default value for
|
|
.Ar qualifier
|
|
is to enable all the above flags.
|
|
.Pp
|
|
The
|
|
.Ar req-type
|
|
qualifier is a 5-bit number can be additionally used to select a
|
|
specific bus request type.
|
|
The default is 0.
|
|
.Pp
|
|
The
|
|
.Dq Li edge
|
|
qualifier should not be used when counting cycles with this event.
|
|
The exact behavior of this event depends on the processor revision.
|
|
.It Li p4-ioq-allocation Xo
|
|
.Op Li ,mask= Ns Ar qualifier
|
|
.Op Li ,busreqtype= Ns Ar req-type
|
|
.Xc
|
|
.Pq "TS event"
|
|
Count various types of transactions on the bus matching the flags set
|
|
in
|
|
.Ar qualifier
|
|
and
|
|
.Ar req-type .
|
|
.Pp
|
|
Qualifier
|
|
.Ar qualifier
|
|
is a
|
|
.Ql +
|
|
separated set of the following flags:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all-read
|
|
Count read entries.
|
|
.It Li all-write
|
|
Count write entries.
|
|
.It Li mem-uc
|
|
Count entries accessing un-cacheable memory.
|
|
.It Li mem-wc
|
|
Count entries accessing write-combining memory.
|
|
.It Li mem-wt
|
|
Count entries accessing write-through memory.
|
|
.It Li mem-wp
|
|
Count entries accessing write-protected memory
|
|
.It Li mem-wb
|
|
Count entries accessing write-back memory.
|
|
.It Li own
|
|
Count store requests driven by the processor (i.e., not by other
|
|
processors or by DMA).
|
|
.It Li other
|
|
Count store requests driven by other processors or by DMA.
|
|
.It Li prefetch
|
|
Include hardware and software prefetch requests in the count.
|
|
.El
|
|
.Pp
|
|
The default value for
|
|
.Ar qualifier
|
|
is to enable all the above flags.
|
|
.Pp
|
|
The
|
|
.Ar req-type
|
|
qualifier is a 5-bit number can be additionally used to select a
|
|
specific bus request type.
|
|
The default is 0.
|
|
.Pp
|
|
The
|
|
.Dq Li edge
|
|
qualifier is normally used with this event to prevent multiple
|
|
counting.
|
|
The exact behavior of this event depends on the processor revision.
|
|
.It Li p4-itlb-reference Op mask= Ns Ar qualifier
|
|
.Pq "TS event"
|
|
Count translations using the instruction translation look-aside
|
|
buffer.
|
|
The
|
|
.Ar qualifier
|
|
argument is a list of the following strings separated by
|
|
.Ql +
|
|
characters.
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li hit
|
|
Count ITLB hits.
|
|
.It Li miss
|
|
Count ITLB misses.
|
|
.It Li hit-uc
|
|
Count un-cacheable ITLB hits.
|
|
.El
|
|
.Pp
|
|
If no
|
|
.Ar qualifier
|
|
is specified the default is to count all the three kinds of ITLB
|
|
translations.
|
|
.It Li p4-load-port-replay Op Li ,mask= Ns Ar qualifier
|
|
.Pq "TS event"
|
|
Count replayed events at the load port.
|
|
Qualifier
|
|
.Ar qualifier
|
|
can take on one value:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li split-ld
|
|
Count split loads.
|
|
.El
|
|
.Pp
|
|
The default value for
|
|
.Ar qualifier
|
|
is
|
|
.Dq Li split-ld .
|
|
.It Li p4-mispred-branch-retired Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count mispredicted IA-32 branch instructions.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li nbogus
|
|
Count non-bogus retired branch instructions.
|
|
.El
|
|
.It Li p4-machine-clear Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count the number of pipeline clears seen by the processor.
|
|
Qualifier
|
|
.Ar flags
|
|
is a list of the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li clear
|
|
Count for a portion of the many cycles when the machine is being
|
|
cleared for any reason.
|
|
.It Li moclear
|
|
Count machine clears due to memory ordering issues.
|
|
.It Li smclear
|
|
Count machine clears due to self-modifying code.
|
|
.El
|
|
.Pp
|
|
Use qualifier
|
|
.Dq Li edge
|
|
to get a count of occurrences of machine clears.
|
|
The default qualifier is
|
|
.Dq Li clear .
|
|
.It Li p4-memory-cancel Op Li ,mask= Ns Ar event-list
|
|
.Pq "TS event"
|
|
Count the canceling of various kinds of requests in the data cache
|
|
address control unit of the CPU.
|
|
The qualifier
|
|
.Ar event-list
|
|
is a list of the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li st-rb-full
|
|
Requests cancelled because no store request buffer was available.
|
|
.It Li 64k-conf
|
|
Requests that conflict due to 64K aliasing.
|
|
.El
|
|
.Pp
|
|
If
|
|
.Ar event-list
|
|
is not specified, then the default is to count both kinds of events.
|
|
.It Li p4-memory-complete Op Li ,mask= Ns Ar event-list
|
|
.Pq "TS event"
|
|
Count the completion of load split, store split, un-cacheable split and
|
|
un-cacheable load operations selected by qualifier
|
|
.Ar event-list .
|
|
The qualifier
|
|
.Ar event-list
|
|
is a
|
|
.Ql +
|
|
separated list of the following flags:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li lsc
|
|
Count load splits completed, excluding loads from un-cacheable or
|
|
write-combining areas.
|
|
.It Li ssc
|
|
Count any split stores completed.
|
|
.El
|
|
.Pp
|
|
The default is to count both kinds of operations.
|
|
.It Li p4-mob-load-replay Op Li ,mask= Ns Ar qualifier
|
|
.Pq "TS event"
|
|
Count load replays triggered by the memory order buffer.
|
|
Qualifier
|
|
.Ar qualifier
|
|
can be a
|
|
.Ql +
|
|
separated list of the following flags:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li no-sta
|
|
Count replays because of unknown store addresses.
|
|
.It Li no-std
|
|
Count replays because of unknown store data.
|
|
.It Li partial-data
|
|
Count replays because of partially overlapped data accesses between
|
|
load and store operations.
|
|
.It Li unalgn-addr
|
|
Count replays because of mismatches in the lower 4 bits of load and
|
|
store operations.
|
|
.El
|
|
.Pp
|
|
The default qualifier is
|
|
.Ar no-sta+no-std+partial-data+unalgn-addr .
|
|
.It Li p4-packed-dp-uop Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count packed double-precision uops.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all
|
|
Count all uops operating on packed double-precision operands.
|
|
.El
|
|
.It Li p4-packed-sp-uop Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count packed single-precision uops.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all
|
|
Count all uops operating on packed single-precision operands.
|
|
.El
|
|
.It Li p4-page-walk-type Op Li ,mask= Ns Ar qualifier
|
|
.Pq "TI event"
|
|
Count page walks performed by the page miss handler.
|
|
Qualifier
|
|
.Ar qualifier
|
|
can be a
|
|
.Ql +
|
|
separated list of the following keywords:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li dtmiss
|
|
Count page walks for data TLB misses.
|
|
.It Li itmiss
|
|
Count page walks for instruction TLB misses.
|
|
.El
|
|
.Pp
|
|
The default value for
|
|
.Ar qualifier
|
|
is
|
|
.Dq Li dtmiss+itmiss .
|
|
.It Li p4-replay-event Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count the retirement of tagged uops selected through the replay
|
|
tagging mechanism.
|
|
Qualifier
|
|
.Ar flags
|
|
contains a
|
|
.Ql +
|
|
separated set of the following strings:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li nbogus
|
|
The marked uops are not bogus.
|
|
.It Li bogus
|
|
The marked uops are bogus.
|
|
.El
|
|
.Pp
|
|
This event requires additional (upstream) events to be allocated to
|
|
perform the desired uop tagging.
|
|
The default qualifier counts both kinds of uops.
|
|
This event can be used for precise event based sampling.
|
|
.It Li p4-resource-stall Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count the occurrence or latency of stalls in the allocator.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li sbfull
|
|
A stall due to the lack of store buffers.
|
|
.El
|
|
.It Li p4-response
|
|
.Pq "TI event"
|
|
Count different types of responses.
|
|
Further documentation on this event is not available.
|
|
.It Li p4-retired-branch-type Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count branches retired.
|
|
Qualifier
|
|
.Ar flags
|
|
contains a
|
|
.Ql +
|
|
separated list of strings:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li conditional
|
|
Count conditional jumps.
|
|
.It Li call
|
|
Count direct and indirect call branches.
|
|
.It Li return
|
|
Count return branches.
|
|
.It Li indirect
|
|
Count returns, indirect calls or indirect jumps.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts all the above branch types.
|
|
.It Li p4-retired-mispred-branch-type Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count mispredicted branches retired.
|
|
Qualifier
|
|
.Ar flags
|
|
contains a
|
|
.Ql +
|
|
separated list of strings:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li conditional
|
|
Count conditional jumps.
|
|
.It Li call
|
|
Count indirect call branches.
|
|
.It Li return
|
|
Count return branches.
|
|
.It Li indirect
|
|
Count returns, indirect calls or indirect jumps.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts all the above branch types.
|
|
.It Li p4-scalar-dp-uop Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count the number of scalar double-precision uops.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all
|
|
Count the number of scalar double-precision uops.
|
|
.El
|
|
.It Li p4-scalar-sp-uop Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count the number of scalar single-precision uops.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all
|
|
Count all uops operating on scalar single-precision operands.
|
|
.El
|
|
.It Li p4-snoop
|
|
.Pq "TI event"
|
|
Count snoop traffic.
|
|
Further documentation on this event is not available.
|
|
.It Li p4-sse-input-assist Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count the number of times an assist is required to handle problems
|
|
with the operands for SSE and SSE2 operations.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all
|
|
Count assists for all SSE and SSE2 uops.
|
|
.El
|
|
.It Li p4-store-port-replay Op Li ,mask= Ns Ar qualifier
|
|
.Pq "TS event"
|
|
Count events replayed at the store port.
|
|
Qualifier
|
|
.Ar qualifier
|
|
can take on one value:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li split-st
|
|
Count split stores.
|
|
.El
|
|
.Pp
|
|
The default value for
|
|
.Ar qualifier
|
|
is
|
|
.Dq Li split-st .
|
|
.It Li p4-tc-deliver-mode Op Li ,mask= Ns Ar qualifier
|
|
.Pq "TI event"
|
|
Count the duration in cycles of operating modes of the trace cache and
|
|
decode engine.
|
|
The desired operating mode is selected by
|
|
.Ar qualifier ,
|
|
which is a list of the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li DD
|
|
Both logical processors are in deliver mode.
|
|
.It Li DB
|
|
Logical processor 0 is in deliver mode while logical processor 1 is in
|
|
build mode.
|
|
.It Li DI
|
|
Logical processor 0 is in deliver mode while logical processor 1 is
|
|
halted, or in machine clear, or transitioning to a long microcode
|
|
flow.
|
|
.It Li BD
|
|
Logical processor 0 is in build mode while logical processor 1 is in
|
|
deliver mode.
|
|
.It Li BB
|
|
Both logical processors are in build mode.
|
|
.It Li BI
|
|
Logical processor 0 is in build mode while logical processor 1 is
|
|
halted, or in machine clear or transitioning to a long microcode
|
|
flow.
|
|
.It Li ID
|
|
Logical processor 0 is halted, or in machine clear or transitioning to
|
|
a long microcode flow while logical processor 1 is in deliver mode.
|
|
.It Li IB
|
|
Logical processor 0 is halted, or in machine clear or transitioning to
|
|
a long microcode flow while logical processor 1 is in build mode.
|
|
.El
|
|
.Pp
|
|
If there is only one logical processor in the processor package then
|
|
the qualifier for logical processor 1 is ignored.
|
|
If no qualifier is specified, the default qualifier is
|
|
.Dq Li DD+DB+DI+BD+BB+BI+ID+IB .
|
|
.It Li p4-tc-ms-xfer Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count the number of times uop delivery changed from the trace cache to
|
|
MS ROM.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li cisc
|
|
Count TC to MS transfers.
|
|
.El
|
|
.It Li p4-uop-queue-writes Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count the number of valid uops written to the uop queue.
|
|
Qualifier
|
|
.Ar flags
|
|
is a list of the following strings, separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li from-tc-build
|
|
Count uops being written from the trace cache in build mode.
|
|
.It Li from-tc-deliver
|
|
Count uops being written from the trace cache in deliver mode.
|
|
.It Li from-rom
|
|
Count uops being written from microcode ROM.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts all the above kinds of uops.
|
|
.It Li p4-uop-type Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
This event is used in conjunction with the front-end at-retirement
|
|
mechanism to tag load and store uops.
|
|
Qualifier
|
|
.Ar flags
|
|
comprises the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li tagloads
|
|
Mark uops that are load operations.
|
|
.It Li tagstores
|
|
Mark uops that are store operations.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts both kinds of uops.
|
|
.It Li p4-uops-retired Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count uops retired during a clock cycle.
|
|
Qualifier
|
|
.Ar flags
|
|
comprises the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li nbogus
|
|
Count marked uops that are not bogus.
|
|
.It Li bogus
|
|
Count marked uops that are bogus.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts both kinds of uops.
|
|
.It Li p4-wc-buffer Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count write-combining buffer operations.
|
|
Qualifier
|
|
.Ar flags
|
|
contains the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li wcb-evicts
|
|
WC buffer evictions due to any cause.
|
|
.It Li wcb-full-evict
|
|
WC buffer evictions due to no WC buffer being available.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts both kinds of evictions.
|
|
.It Li p4-x87-assist Op Li ,mask= Ns Ar flags
|
|
.Pq "TS event"
|
|
Count the retirement of x87 instructions that required special
|
|
handling.
|
|
Qualifier
|
|
.Ar flags
|
|
contains the following strings separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li fpsu
|
|
Count instructions that saw an FP stack underflow.
|
|
.It Li fpso
|
|
Count instructions that saw an FP stack overflow.
|
|
.It Li poao
|
|
Count instructions that saw an x87 output overflow.
|
|
.It Li poau
|
|
Count instructions that saw an x87 output underflow.
|
|
.It Li prea
|
|
Count instructions that needed an x87 input assist.
|
|
.El
|
|
.Pp
|
|
The default qualifier counts all the above types of instruction
|
|
retirements.
|
|
.It Li p4-x87-fp-uop Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count x87 floating-point uops.
|
|
Qualifier
|
|
.Ar flags
|
|
can take the following value (which is also the default):
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li all
|
|
Count all x87 floating-point uops.
|
|
.El
|
|
.Pp
|
|
If an instruction contains more than one x87 floating-point uops, then
|
|
all x87 floating-point uops will be counted.
|
|
This event does not count x87 floating-point data movement operations.
|
|
.It Li p4-x87-simd-moves-uop Op Li ,mask= Ns Ar flags
|
|
.Pq "TI event"
|
|
Count each x87 FPU, MMX, SSE, or SSE2 uops that load data or store
|
|
data or perform register-to-register moves.
|
|
This event does not count integer move uops.
|
|
Qualifier
|
|
.Ar flags
|
|
may contain the following keywords separated by
|
|
.Ql +
|
|
characters:
|
|
.Pp
|
|
.Bl -tag -width indent -compact
|
|
.It Li allp0
|
|
Count all x87 and SIMD store and move uops.
|
|
.It Li allp2
|
|
Count all x87 and SIMD load uops.
|
|
.El
|
|
.Pp
|
|
The default is to count all uops.
|
|
.Pq Errata
|
|
This event may be affected by processor errata N43.
|
|
.El
|
|
.Ss "Cascading P4 PMCs"
|
|
PMC cascading support is currently poorly implemented.
|
|
While individual event counters may be allocated with a
|
|
.Dq Li cascade
|
|
qualifier, the current API does not offer the ability
|
|
to name and allocate all the resources needed for a
|
|
cascaded event counter pair in a single operation.
|
|
.Ss "Precise Event Based Sampling"
|
|
Support for precise event based sampling is currently
|
|
unimplemented.
|
|
.Ss Event Name Aliases
|
|
The following table shows the mapping between the PMC-independent
|
|
aliases supported by
|
|
.Lb libpmc
|
|
and the underlying hardware events used.
|
|
.Bl -column "branch-mispredicts" "Description"
|
|
.It Em Alias Ta Em Event
|
|
.It Li branches Ta Li p4-branch-retired,mask=mmtp+mmtm
|
|
.It Li branch-mispredicts Ta Li p4-mispred-branch-retired
|
|
.It Li dc-misses Ta (unsupported)
|
|
.It Li ic-misses Ta (unsupported)
|
|
.It Li instructions Ta Li p4-instr-retired,mask=nbogusntag+nbogustag
|
|
.It Li interrupts Ta Li (unsupported)
|
|
.It Li unhalted-cycles Ta Li p4-global-power-events
|
|
.El
|
|
.Sh SEE ALSO
|
|
.Xr pmc 3 ,
|
|
.Xr pmc.atom 3 ,
|
|
.Xr pmc.core 3 ,
|
|
.Xr pmc.core2 3 ,
|
|
.Xr pmc.iaf 3 ,
|
|
.Xr pmc.k7 3 ,
|
|
.Xr pmc.k8 3 ,
|
|
.Xr pmc.p5 3 ,
|
|
.Xr pmc.p6 3 ,
|
|
.Xr pmc.tsc 3 ,
|
|
.Xr pmclog 3 ,
|
|
.Xr hwpmc 4
|
|
.Sh HISTORY
|
|
The
|
|
.Nm pmc
|
|
library first appeared in
|
|
.Fx 6.0 .
|
|
.Sh AUTHORS
|
|
The
|
|
.Lb libpmc
|
|
library was written by
|
|
.An "Joseph Koshy"
|
|
.Aq jkoshy@FreeBSD.org .
|