65e9886a96
I've taken a slightly different approach than is used with the ICH8 controllers in that each controller is not identified individually (eg USB A, USB B, etc). Instead I've given then same description to each one even though the device ID differs. This can easily be changed if desired, or ICH8 (and any others using that approach) can be made to work as this does.
618 lines
17 KiB
C
618 lines
17 KiB
C
/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Lennart Augustsson (augustss@carlstedt.se) at
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* Carlstedt Research & Technology.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
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*
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* The EHCI 1.0 spec can be found at
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* http://developer.intel.com/technology/usb/download/ehci-r10.pdf
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* and the USB 2.0 spec at
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* http://www.usb.org/developers/docs/usb_20.zip
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*/
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/* The low level controller code for EHCI has been split into
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* PCI probes and EHCI specific code. This was done to facilitate the
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* sharing of code between *BSD's
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*/
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <sys/queue.h>
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#include <sys/lockmgr.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usbdivar.h>
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#include <dev/usb/usb_mem.h>
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#include <dev/usb/ehcireg.h>
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#include <dev/usb/ehcivar.h>
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#define PCI_EHCI_VENDORID_ACERLABS 0x10b9
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#define PCI_EHCI_VENDORID_AMD 0x1022
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#define PCI_EHCI_VENDORID_APPLE 0x106b
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#define PCI_EHCI_VENDORID_ATI 0x1002
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#define PCI_EHCI_VENDORID_CMDTECH 0x1095
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#define PCI_EHCI_VENDORID_INTEL 0x8086
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#define PCI_EHCI_VENDORID_NEC 0x1033
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#define PCI_EHCI_VENDORID_OPTI 0x1045
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#define PCI_EHCI_VENDORID_PHILIPS 0x1131
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#define PCI_EHCI_VENDORID_SIS 0x1039
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#define PCI_EHCI_VENDORID_NVIDIA 0x12D2
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#define PCI_EHCI_VENDORID_NVIDIA2 0x10DE
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#define PCI_EHCI_VENDORID_VIA 0x1106
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/* AcerLabs/ALi */
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#define PCI_EHCI_DEVICEID_M5239 0x523910b9
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static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
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/* AMD */
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#define PCI_EHCI_DEVICEID_8111 0x10227463
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static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
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/* ATI */
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#define PCI_EHCI_DEVICEID_SB200 0x43451002
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static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_SB400 0x43731002
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static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
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/* Intel */
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#define PCI_EHCI_DEVICEID_6300 0x25ad8086
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static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_ICH4 0x24cd8086
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static const char *ehci_device_ich4 = "Intel 82801DB/L/M (ICH4) USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_ICH5 0x24dd8086
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static const char *ehci_device_ich5 = "Intel 82801EB/R (ICH5) USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_ICH6 0x265c8086
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static const char *ehci_device_ich6 = "Intel 82801FB (ICH6) USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_ICH7 0x27cc8086
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static const char *ehci_device_ich7 = "Intel 82801GB/R (ICH7) USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_ICH8_A 0x28368086
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static const char *ehci_device_ich8_a = "Intel 82801H (ICH8) USB 2.0 controller USB2-A";
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#define PCI_EHCI_DEVICEID_ICH8_B 0x283a8086
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static const char *ehci_device_ich8_b = "Intel 82801H (ICH8) USB 2.0 controller USB2-B";
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#define PCI_EHCI_DEVICEID_ICH9_A 0x293a8086
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#define PCI_EHCI_DEVICEID_ICH9_B 0x293c8086
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static const char *ehci_device_ich9 = "Intel 82801I (ICH9) USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_63XX 0x268c8086
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static const char *ehci_device_63XX = "Intel 63XXESB USB 2.0 controller";
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/* NEC */
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#define PCI_EHCI_DEVICEID_NEC 0x00e01033
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static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
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/* NVIDIA */
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#define PCI_EHCI_DEVICEID_NF2 0x006810de
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static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_NF2_400 0x008810de
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static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_NF3 0x00d810de
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static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_NF3_250 0x00e810de
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static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_NF4 0x005b10de
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static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
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/* Philips */
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#define PCI_EHCI_DEVICEID_ISP156X 0x15621131
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static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
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#define PCI_EHCI_DEVICEID_VIA 0x31041106
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static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
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static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
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#define PCI_EHCI_BASE_REG 0x10
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#ifdef USB_DEBUG
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#define EHCI_DEBUG USB_DEBUG
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#define DPRINTF(x) do { if (ehcidebug) printf x; } while (0)
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extern int ehcidebug;
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#else
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#define DPRINTF(x)
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#endif
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static device_attach_t ehci_pci_attach;
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static device_detach_t ehci_pci_detach;
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static device_shutdown_t ehci_pci_shutdown;
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static device_suspend_t ehci_pci_suspend;
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static device_resume_t ehci_pci_resume;
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static void ehci_pci_givecontroller(device_t self);
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static void ehci_pci_takecontroller(device_t self);
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static int
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ehci_pci_suspend(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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int err;
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err = bus_generic_suspend(self);
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if (err)
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return (err);
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ehci_power(PWR_SUSPEND, sc);
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return 0;
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}
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static int
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ehci_pci_resume(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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ehci_pci_takecontroller(self);
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ehci_power(PWR_RESUME, sc);
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bus_generic_resume(self);
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return 0;
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}
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static int
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ehci_pci_shutdown(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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int err;
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err = bus_generic_shutdown(self);
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if (err)
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return (err);
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ehci_shutdown(sc);
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ehci_pci_givecontroller(self);
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return 0;
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}
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static const char *
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ehci_pci_match(device_t self)
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{
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u_int32_t device_id = pci_get_devid(self);
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switch (device_id) {
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case PCI_EHCI_DEVICEID_M5239:
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return (ehci_device_m5239);
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case PCI_EHCI_DEVICEID_8111:
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return (ehci_device_8111);
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case PCI_EHCI_DEVICEID_SB200:
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return (ehci_device_sb200);
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case PCI_EHCI_DEVICEID_SB400:
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return (ehci_device_sb400);
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case PCI_EHCI_DEVICEID_6300:
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return (ehci_device_6300);
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case PCI_EHCI_DEVICEID_63XX:
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return (ehci_device_63XX);
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case PCI_EHCI_DEVICEID_ICH4:
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return (ehci_device_ich4);
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case PCI_EHCI_DEVICEID_ICH5:
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return (ehci_device_ich5);
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case PCI_EHCI_DEVICEID_ICH6:
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return (ehci_device_ich6);
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case PCI_EHCI_DEVICEID_ICH7:
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return (ehci_device_ich7);
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case PCI_EHCI_DEVICEID_ICH8_A:
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return (ehci_device_ich8_a);
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case PCI_EHCI_DEVICEID_ICH8_B:
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return (ehci_device_ich8_b);
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case PCI_EHCI_DEVICEID_ICH9_A:
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case PCI_EHCI_DEVICEID_ICH9_B:
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return (ehci_device_ich9);
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case PCI_EHCI_DEVICEID_NEC:
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return (ehci_device_nec);
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case PCI_EHCI_DEVICEID_NF2:
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return (ehci_device_nf2);
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case PCI_EHCI_DEVICEID_NF2_400:
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return (ehci_device_nf2_400);
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case PCI_EHCI_DEVICEID_NF3:
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return (ehci_device_nf3);
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case PCI_EHCI_DEVICEID_NF3_250:
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return (ehci_device_nf3_250);
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case PCI_EHCI_DEVICEID_NF4:
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return (ehci_device_nf4);
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case PCI_EHCI_DEVICEID_ISP156X:
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return (ehci_device_isp156x);
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case PCI_EHCI_DEVICEID_VIA:
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return (ehci_device_via);
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default:
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if (pci_get_class(self) == PCIC_SERIALBUS
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&& pci_get_subclass(self) == PCIS_SERIALBUS_USB
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&& pci_get_progif(self) == PCI_INTERFACE_EHCI) {
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return (ehci_device_generic);
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}
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}
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return NULL; /* dunno */
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}
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static int
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ehci_pci_probe(device_t self)
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{
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const char *desc = ehci_pci_match(self);
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if (desc) {
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device_set_desc(self, desc);
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return BUS_PROBE_DEFAULT;
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} else {
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return ENXIO;
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}
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}
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static int
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ehci_pci_attach(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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devclass_t dc;
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device_t parent;
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device_t *neighbors;
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device_t *nbus;
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struct usbd_bus *bsc;
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int err;
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int rid;
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int ncomp;
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int count, buscount;
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int slot, function;
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int res;
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int i;
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switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
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case PCI_USBREV_PRE_1_0:
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case PCI_USBREV_1_0:
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case PCI_USBREV_1_1:
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sc->sc_bus.usbrev = USBREV_UNKNOWN;
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device_printf(self, "pre-2.0 USB rev\n");
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return ENXIO;
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case PCI_USBREV_2_0:
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sc->sc_bus.usbrev = USBREV_2_0;
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break;
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default:
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sc->sc_bus.usbrev = USBREV_UNKNOWN;
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break;
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}
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pci_enable_busmaster(self);
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rid = PCI_CBMEM;
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sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->io_res) {
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device_printf(self, "Could not map memory\n");
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return ENXIO;
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}
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sc->iot = rman_get_bustag(sc->io_res);
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sc->ioh = rman_get_bushandle(sc->io_res);
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->irq_res == NULL) {
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device_printf(self, "Could not allocate irq\n");
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ehci_pci_detach(self);
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return ENXIO;
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}
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sc->sc_bus.bdev = device_add_child(self, "usb", -1);
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if (!sc->sc_bus.bdev) {
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device_printf(self, "Could not add USB device\n");
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ehci_pci_detach(self);
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return ENOMEM;
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}
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device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
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/* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
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device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
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switch (pci_get_vendor(self)) {
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case PCI_EHCI_VENDORID_ACERLABS:
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sprintf(sc->sc_vendor, "AcerLabs");
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break;
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case PCI_EHCI_VENDORID_AMD:
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sprintf(sc->sc_vendor, "AMD");
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break;
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case PCI_EHCI_VENDORID_APPLE:
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sprintf(sc->sc_vendor, "Apple");
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break;
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case PCI_EHCI_VENDORID_ATI:
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sprintf(sc->sc_vendor, "ATI");
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break;
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case PCI_EHCI_VENDORID_CMDTECH:
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sprintf(sc->sc_vendor, "CMDTECH");
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break;
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case PCI_EHCI_VENDORID_INTEL:
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sprintf(sc->sc_vendor, "Intel");
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break;
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case PCI_EHCI_VENDORID_NEC:
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sprintf(sc->sc_vendor, "NEC");
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break;
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case PCI_EHCI_VENDORID_OPTI:
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sprintf(sc->sc_vendor, "OPTi");
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break;
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case PCI_EHCI_VENDORID_SIS:
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sprintf(sc->sc_vendor, "SiS");
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break;
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case PCI_EHCI_VENDORID_NVIDIA:
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case PCI_EHCI_VENDORID_NVIDIA2:
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sprintf(sc->sc_vendor, "nVidia");
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break;
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case PCI_EHCI_VENDORID_VIA:
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sprintf(sc->sc_vendor, "VIA");
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break;
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default:
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if (bootverbose)
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device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
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pci_get_devid(self));
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sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
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}
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err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO,
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NULL, (driver_intr_t *)ehci_intr, sc, &sc->ih);
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if (err) {
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device_printf(self, "Could not setup irq, %d\n", err);
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sc->ih = NULL;
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ehci_pci_detach(self);
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return ENXIO;
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}
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/* Enable workaround for dropped interrupts as required */
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switch (pci_get_vendor(self)) {
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case PCI_EHCI_VENDORID_ATI:
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case PCI_EHCI_VENDORID_VIA:
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sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
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if (bootverbose)
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device_printf(self,
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"Dropped interrupts workaround enabled\n");
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break;
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default:
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break;
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}
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/*
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* Find companion controllers. According to the spec they always
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* have lower function numbers so they should be enumerated already.
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*/
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parent = device_get_parent(self);
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res = device_get_children(parent, &neighbors, &count);
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if (res != 0) {
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device_printf(self, "Error finding companion busses\n");
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ehci_pci_detach(self);
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return ENXIO;
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}
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ncomp = 0;
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dc = devclass_find("usb");
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slot = pci_get_slot(self);
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function = pci_get_function(self);
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for (i = 0; i < count; i++) {
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if (pci_get_slot(neighbors[i]) == slot && \
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pci_get_function(neighbors[i]) < function) {
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res = device_get_children(neighbors[i],
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&nbus, &buscount);
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if (res != 0)
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continue;
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if (buscount != 1) {
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free(nbus, M_TEMP);
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continue;
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}
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if (device_get_devclass(nbus[0]) != dc) {
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free(nbus, M_TEMP);
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continue;
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}
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bsc = device_get_softc(nbus[0]);
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free(nbus, M_TEMP);
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DPRINTF(("ehci_pci_attach: companion %s\n",
|
|
device_get_nameunit(bsc->bdev)));
|
|
sc->sc_comps[ncomp++] = bsc;
|
|
if (ncomp >= EHCI_COMPANION_MAX)
|
|
break;
|
|
}
|
|
}
|
|
sc->sc_ncomp = ncomp;
|
|
|
|
/* Allocate a parent dma tag for DMA maps */
|
|
err = bus_dma_tag_create(bus_get_dma_tag(self), 1, 0,
|
|
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
|
|
BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
|
|
NULL, NULL, &sc->sc_bus.parent_dmatag);
|
|
if (err) {
|
|
device_printf(self, "Could not allocate parent DMA tag (%d)\n",
|
|
err);
|
|
ehci_pci_detach(self);
|
|
return ENXIO;
|
|
}
|
|
|
|
/* Allocate a dma tag for transfer buffers */
|
|
err = bus_dma_tag_create(sc->sc_bus.parent_dmatag, 1, 0,
|
|
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
|
|
BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
|
|
busdma_lock_mutex, &Giant, &sc->sc_bus.buffer_dmatag);
|
|
if (err) {
|
|
device_printf(self, "Could not allocate buffer DMA tag (%d)\n",
|
|
err);
|
|
ehci_pci_detach(self);
|
|
return ENXIO;
|
|
}
|
|
|
|
ehci_pci_takecontroller(self);
|
|
err = ehci_init(sc);
|
|
if (!err) {
|
|
sc->sc_flags |= EHCI_SCFLG_DONEINIT;
|
|
err = device_probe_and_attach(sc->sc_bus.bdev);
|
|
}
|
|
|
|
if (err) {
|
|
device_printf(self, "USB init failed err=%d\n", err);
|
|
ehci_pci_detach(self);
|
|
return EIO;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ehci_pci_detach(device_t self)
|
|
{
|
|
ehci_softc_t *sc = device_get_softc(self);
|
|
|
|
if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
|
|
ehci_detach(sc, 0);
|
|
sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
|
|
}
|
|
|
|
/*
|
|
* disable interrupts that might have been switched on in ehci_init
|
|
*/
|
|
if (sc->iot && sc->ioh)
|
|
bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
|
|
if (sc->sc_bus.parent_dmatag != NULL)
|
|
bus_dma_tag_destroy(sc->sc_bus.parent_dmatag);
|
|
if (sc->sc_bus.buffer_dmatag != NULL)
|
|
bus_dma_tag_destroy(sc->sc_bus.buffer_dmatag);
|
|
|
|
if (sc->irq_res && sc->ih) {
|
|
int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
|
|
|
|
if (err)
|
|
/* XXX or should we panic? */
|
|
device_printf(self, "Could not tear down irq, %d\n",
|
|
err);
|
|
sc->ih = NULL;
|
|
}
|
|
if (sc->sc_bus.bdev) {
|
|
device_delete_child(self, sc->sc_bus.bdev);
|
|
sc->sc_bus.bdev = NULL;
|
|
}
|
|
if (sc->irq_res) {
|
|
bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
|
|
sc->irq_res = NULL;
|
|
}
|
|
if (sc->io_res) {
|
|
bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
|
|
sc->io_res = NULL;
|
|
sc->iot = 0;
|
|
sc->ioh = 0;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
ehci_pci_takecontroller(device_t self)
|
|
{
|
|
ehci_softc_t *sc = device_get_softc(self);
|
|
u_int32_t cparams, eec, legsup;
|
|
int eecp, i;
|
|
|
|
cparams = EREAD4(sc, EHCI_HCCPARAMS);
|
|
|
|
/* Synchronise with the BIOS if it owns the controller. */
|
|
for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
|
|
eecp = EHCI_EECP_NEXT(eec)) {
|
|
eec = pci_read_config(self, eecp, 4);
|
|
if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
|
|
continue;
|
|
legsup = eec;
|
|
if (legsup & EHCI_LEGSUP_BIOSOWNED) {
|
|
pci_write_config(self, eecp,
|
|
legsup | EHCI_LEGSUP_OSOWNED, 4);
|
|
printf("%s: waiting for BIOS to give up control\n",
|
|
device_get_nameunit(sc->sc_bus.bdev));
|
|
for (i = 0; i < 5000; i++) {
|
|
legsup = pci_read_config(self, eecp, 4);
|
|
if ((legsup & EHCI_LEGSUP_BIOSOWNED) == 0)
|
|
break;
|
|
DELAY(1000);
|
|
}
|
|
if (legsup & EHCI_LEGSUP_BIOSOWNED)
|
|
printf("%s: timed out waiting for BIOS\n",
|
|
device_get_nameunit(sc->sc_bus.bdev));
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
ehci_pci_givecontroller(device_t self)
|
|
{
|
|
#if 0
|
|
ehci_softc_t *sc = device_get_softc(self);
|
|
u_int32_t cparams, eec, legsup;
|
|
int eecp;
|
|
|
|
cparams = EREAD4(sc, EHCI_HCCPARAMS);
|
|
for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
|
|
eecp = EHCI_EECP_NEXT(eec)) {
|
|
eec = pci_read_config(self, eecp, 4);
|
|
if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
|
|
continue;
|
|
legsup = eec;
|
|
pci_write_config(self, eecp, legsup & ~EHCI_LEGSUP_OSOWNED, 4);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static device_method_t ehci_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, ehci_pci_probe),
|
|
DEVMETHOD(device_attach, ehci_pci_attach),
|
|
DEVMETHOD(device_detach, ehci_pci_detach),
|
|
DEVMETHOD(device_suspend, ehci_pci_suspend),
|
|
DEVMETHOD(device_resume, ehci_pci_resume),
|
|
DEVMETHOD(device_shutdown, ehci_pci_shutdown),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
|
|
|
{0, 0}
|
|
};
|
|
|
|
static driver_t ehci_driver = {
|
|
"ehci",
|
|
ehci_methods,
|
|
sizeof(ehci_softc_t),
|
|
};
|
|
|
|
static devclass_t ehci_devclass;
|
|
|
|
DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
|
|
DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, 0, 0);
|