78d763a29b
- New manpages with event lists. - Add MSRs for the Intel Sandy Bridge microarchitecture Reviewed by: attilio, brueffer, fabient Approved by: gnn (mentor) MFC after: 3 weeks
75 lines
1.7 KiB
Makefile
75 lines
1.7 KiB
Makefile
# $FreeBSD$
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LIB= pmc
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SRCS= libpmc.c pmclog.c
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INCS= pmc.h pmclog.h
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MAN= pmc.3
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MAN+= pmc_allocate.3
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MAN+= pmc_attach.3
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MAN+= pmc_capabilities.3
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MAN+= pmc_configure_logfile.3
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MAN+= pmc_disable.3
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MAN+= pmc_event_names_of_class.3
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MAN+= pmc_get_driver_stats.3
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MAN+= pmc_get_msr.3
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MAN+= pmc_init.3
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MAN+= pmc_name_of_capability.3
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MAN+= pmc_read.3
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MAN+= pmc_set.3
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MAN+= pmc_start.3
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MAN+= pmclog.3
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# PMC-dependent manual pages
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.if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64"
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MAN+= pmc.atom.3
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MAN+= pmc.core.3
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MAN+= pmc.core2.3
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MAN+= pmc.iaf.3
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MAN+= pmc.ucf.3
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MAN+= pmc.k7.3
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MAN+= pmc.k8.3
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MAN+= pmc.p4.3
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MAN+= pmc.p5.3
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MAN+= pmc.p6.3
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MAN+= pmc.corei7.3
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MAN+= pmc.corei7uc.3
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MAN+= pmc.sandybridge.3
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MAN+= pmc.sandybridgeuc.3
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MAN+= pmc.westmere.3
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MAN+= pmc.westmereuc.3
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MAN+= pmc.tsc.3
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.elif ${MACHINE_CPUARCH} == "arm" && ${CPUTYPE} == "xscale"
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MAN+= pmc.xscale.3
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.endif
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MLINKS+= \
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pmc_allocate.3 pmc_release.3 \
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pmc_attach.3 pmc_detach.3 \
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pmc_capabilities.3 pmc_ncpu.3 \
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pmc_capabilities.3 pmc_npmc.3 \
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pmc_capabilities.3 pmc_pmcinfo.3 \
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pmc_capabilities.3 pmc_cpuinfo.3 \
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pmc_capabilities.3 pmc_width.3 \
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pmc_configure_logfile.3 pmc_flush_logfile.3 \
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pmc_configure_logfile.3 pmc_writelog.3 \
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pmc_disable.3 pmc_enable.3 \
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pmc_name_of_capability.3 pmc_name_of_class.3 \
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pmc_name_of_capability.3 pmc_name_of_cputype.3 \
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pmc_name_of_capability.3 pmc_name_of_disposition.3 \
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pmc_name_of_capability.3 pmc_name_of_event.3 \
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pmc_name_of_capability.3 pmc_name_of_mode.3 \
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pmc_name_of_capability.3 pmc_name_of_state.3 \
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pmc_read.3 pmc_rw.3 \
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pmc_read.3 pmc_write.3 \
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pmc_start.3 pmc_stop.3
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MLINKS+= \
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pmclog.3 pmclog_open.3 \
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pmclog.3 pmclog_close.3 \
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pmclog.3 pmclog_feed.3 \
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pmclog.3 pmclog_read.3
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.include <bsd.lib.mk>
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