Neel Natu 712bd51ada Add macros for AMD-specific bits in MSR_EFER: LMSLE, FFXSR and TCE. ...

AMDID_FFXSR is at bit 25 so correct its value to 0x02000000.

MFC after:	1 week

2015-05-06 05:12:29 +00:00

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acpica

Reassign copyright statements on several files from Advanced

2015-04-23 14:22:20 +00:00

bios

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cpufreq

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include

Add macros for AMD-specific bits in MSR_EFER: LMSLE, FFXSR and TCE.

2015-05-06 05:12:29 +00:00

iommu

Account for the offset of the page run when allocating the

2015-04-08 01:55:22 +00:00

isa

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pci

Reassign copyright statements on several files from Advanced

2015-04-23 14:22:20 +00:00

x86

Remove support for Xen PV domU kernels. Support for HVM domU kernels

2015-04-30 15:48:48 +00:00

xen

Remove support for Xen PV domU kernels. Support for HVM domU kernels

2015-04-30 15:48:48 +00:00