76b7512247
device drivers that used to provide this feature. Reviewed by: des Approved by: cperciva MFC after: 1 week
441 lines
13 KiB
C
441 lines
13 KiB
C
/*-
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* Copyright (c) 2003-2005 Nate Lawson (SDG)
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* Copyright (c) 2001 Michael Smith
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <dev/acpica/acpivar.h>
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#include <dev/pci/pcivar.h>
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#include "cpufreq_if.h"
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/*
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* Throttling provides relative frequency control. It involves modulating
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* the clock so that the CPU is active for only a fraction of the normal
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* clock cycle. It does not change voltage and so is less efficient than
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* other mechanisms. Since it is relative, it can be used in addition to
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* absolute cpufreq drivers. We support the ACPI 2.0 specification.
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*/
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struct acpi_throttle_softc {
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device_t cpu_dev;
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ACPI_HANDLE cpu_handle;
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uint32_t cpu_p_blk; /* ACPI P_BLK location */
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uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
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struct resource *cpu_p_cnt; /* Throttling control register */
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int cpu_p_type; /* Resource type for cpu_p_cnt. */
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uint32_t cpu_thr_state; /* Current throttle setting. */
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};
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#define THR_GET_REG(reg) \
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(bus_space_read_4(rman_get_bustag((reg)), \
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rman_get_bushandle((reg)), 0))
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#define THR_SET_REG(reg, val) \
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(bus_space_write_4(rman_get_bustag((reg)), \
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rman_get_bushandle((reg)), 0, (val)))
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/*
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* Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and
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* reported to the user in hundredths of a percent.
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*/
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#define CPU_MAX_SPEED (1 << cpu_duty_width)
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#define CPU_SPEED_PERCENT(x) ((10000 * (x)) / CPU_MAX_SPEED)
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#define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
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(CPU_SPEED_PERCENT(x) % 10)
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#define CPU_P_CNT_THT_EN (1<<4)
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#define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */
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#define PCI_VENDOR_INTEL 0x8086
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#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
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#define PCI_REVISION_A_STEP 0
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#define PCI_REVISION_B_STEP 1
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static uint32_t cpu_duty_offset; /* Offset in P_CNT of throttle val. */
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static uint32_t cpu_duty_width; /* Bit width of throttle value. */
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static int thr_rid; /* Driver-wide resource id. */
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static int thr_quirks; /* Indicate any hardware bugs. */
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static void acpi_throttle_identify(driver_t *driver, device_t parent);
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static int acpi_throttle_probe(device_t dev);
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static int acpi_throttle_attach(device_t dev);
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static int acpi_throttle_evaluate(struct acpi_throttle_softc *sc);
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static int acpi_throttle_quirks(struct acpi_throttle_softc *sc);
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static int acpi_thr_settings(device_t dev, struct cf_setting *sets,
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int *count);
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static int acpi_thr_set(device_t dev, const struct cf_setting *set);
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static int acpi_thr_get(device_t dev, struct cf_setting *set);
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static int acpi_thr_type(device_t dev, int *type);
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static device_method_t acpi_throttle_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, acpi_throttle_identify),
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DEVMETHOD(device_probe, acpi_throttle_probe),
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DEVMETHOD(device_attach, acpi_throttle_attach),
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/* cpufreq interface */
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DEVMETHOD(cpufreq_drv_set, acpi_thr_set),
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DEVMETHOD(cpufreq_drv_get, acpi_thr_get),
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DEVMETHOD(cpufreq_drv_type, acpi_thr_type),
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DEVMETHOD(cpufreq_drv_settings, acpi_thr_settings),
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{0, 0}
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};
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static driver_t acpi_throttle_driver = {
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"acpi_throttle",
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acpi_throttle_methods,
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sizeof(struct acpi_throttle_softc),
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};
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static devclass_t acpi_throttle_devclass;
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DRIVER_MODULE(acpi_throttle, cpu, acpi_throttle_driver, acpi_throttle_devclass,
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0, 0);
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static void
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acpi_throttle_identify(driver_t *driver, device_t parent)
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{
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ACPI_BUFFER buf;
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ACPI_HANDLE handle;
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ACPI_OBJECT *obj;
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/* Make sure we're not being doubly invoked. */
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if (device_find_child(parent, "acpi_throttle", -1))
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return;
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/* Check for a valid duty width and parent CPU type. */
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handle = acpi_get_handle(parent);
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if (handle == NULL)
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return;
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if (AcpiGbl_FADT.DutyWidth == 0 ||
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acpi_get_type(parent) != ACPI_TYPE_PROCESSOR)
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return;
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/*
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* Add a child if there's a non-NULL P_BLK and correct length, or
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* if the _PTC method is present.
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*/
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buf.Pointer = NULL;
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buf.Length = ACPI_ALLOCATE_BUFFER;
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if (ACPI_FAILURE(AcpiEvaluateObject(handle, NULL, NULL, &buf)))
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return;
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obj = (ACPI_OBJECT *)buf.Pointer;
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if ((obj->Processor.PblkAddress && obj->Processor.PblkLength >= 4) ||
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ACPI_SUCCESS(AcpiEvaluateObject(handle, "_PTC", NULL, NULL))) {
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if (BUS_ADD_CHILD(parent, 0, "acpi_throttle", -1) == NULL)
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device_printf(parent, "add throttle child failed\n");
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}
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AcpiOsFree(obj);
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}
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static int
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acpi_throttle_probe(device_t dev)
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{
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/*
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* On i386 platforms at least, ACPI throttling is accomplished by
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* the chipset modulating the STPCLK# pin based on the duty cycle.
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* Since p4tcc uses the same mechanism (but internal to the CPU),
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* we disable acpi_throttle when p4tcc is also present.
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*/
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if (device_find_child(device_get_parent(dev), "p4tcc", -1) &&
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!resource_disabled("p4tcc", 0))
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return (ENXIO);
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device_set_desc(dev, "ACPI CPU Throttling");
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return (0);
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}
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static int
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acpi_throttle_attach(device_t dev)
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{
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struct acpi_throttle_softc *sc;
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struct cf_setting set;
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ACPI_BUFFER buf;
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ACPI_OBJECT *obj;
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ACPI_STATUS status;
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int error;
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sc = device_get_softc(dev);
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sc->cpu_dev = dev;
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sc->cpu_handle = acpi_get_handle(dev);
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buf.Pointer = NULL;
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buf.Length = ACPI_ALLOCATE_BUFFER;
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status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "attach failed to get Processor obj - %s\n",
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AcpiFormatException(status));
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return (ENXIO);
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}
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obj = (ACPI_OBJECT *)buf.Pointer;
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sc->cpu_p_blk = obj->Processor.PblkAddress;
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sc->cpu_p_blk_len = obj->Processor.PblkLength;
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AcpiOsFree(obj);
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/* If this is the first device probed, check for quirks. */
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if (device_get_unit(dev) == 0)
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acpi_throttle_quirks(sc);
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/* Attempt to attach the actual throttling register. */
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error = acpi_throttle_evaluate(sc);
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if (error)
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return (error);
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/*
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* Set our initial frequency to the highest since some systems
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* seem to boot with this at the lowest setting.
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*/
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set.freq = 10000;
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acpi_thr_set(dev, &set);
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/* Everything went ok, register with cpufreq(4). */
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cpufreq_register(dev);
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return (0);
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}
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static int
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acpi_throttle_evaluate(struct acpi_throttle_softc *sc)
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{
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uint32_t duty_end;
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ACPI_BUFFER buf;
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ACPI_OBJECT obj;
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ACPI_GENERIC_ADDRESS gas;
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ACPI_STATUS status;
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/* Get throttling parameters from the FADT. 0 means not supported. */
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if (device_get_unit(sc->cpu_dev) == 0) {
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cpu_duty_offset = AcpiGbl_FADT.DutyOffset;
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cpu_duty_width = AcpiGbl_FADT.DutyWidth;
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}
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if (cpu_duty_width == 0 || (thr_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
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return (ENXIO);
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/* Validate the duty offset/width. */
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duty_end = cpu_duty_offset + cpu_duty_width - 1;
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if (duty_end > 31) {
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device_printf(sc->cpu_dev,
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"CLK_VAL field overflows P_CNT register\n");
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return (ENXIO);
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}
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if (cpu_duty_offset <= 4 && duty_end >= 4) {
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device_printf(sc->cpu_dev,
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"CLK_VAL field overlaps THT_EN bit\n");
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return (ENXIO);
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}
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/*
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* If not present, fall back to using the processor's P_BLK to find
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* the P_CNT register.
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*
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* Note that some systems seem to duplicate the P_BLK pointer
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* across multiple CPUs, so not getting the resource is not fatal.
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*/
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buf.Pointer = &obj;
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buf.Length = sizeof(obj);
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status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
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if (ACPI_SUCCESS(status)) {
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if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
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device_printf(sc->cpu_dev, "_PTC buffer too small\n");
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return (ENXIO);
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}
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memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
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acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_p_type, &thr_rid,
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&gas, &sc->cpu_p_cnt, 0);
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if (sc->cpu_p_cnt != NULL && bootverbose) {
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device_printf(sc->cpu_dev, "P_CNT from _PTC %#jx\n",
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gas.Address);
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}
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}
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/* If _PTC not present or other failure, try the P_BLK. */
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if (sc->cpu_p_cnt == NULL) {
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/*
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* The spec says P_BLK must be 6 bytes long. However, some
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* systems use it to indicate a fractional set of features
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* present so we take anything >= 4.
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*/
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if (sc->cpu_p_blk_len < 4)
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return (ENXIO);
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gas.Address = sc->cpu_p_blk;
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gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
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gas.BitWidth = 32;
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acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_p_type, &thr_rid,
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&gas, &sc->cpu_p_cnt, 0);
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if (sc->cpu_p_cnt != NULL) {
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if (bootverbose)
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device_printf(sc->cpu_dev,
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"P_CNT from P_BLK %#x\n", sc->cpu_p_blk);
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} else {
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device_printf(sc->cpu_dev, "failed to attach P_CNT\n");
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return (ENXIO);
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}
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}
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thr_rid++;
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return (0);
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}
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static int
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acpi_throttle_quirks(struct acpi_throttle_softc *sc)
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{
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device_t acpi_dev;
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/* Look for various quirks of the PIIX4 part. */
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acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
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if (acpi_dev) {
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switch (pci_get_revid(acpi_dev)) {
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/*
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* Disable throttling control on PIIX4 A and B-step.
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* See specification changes #13 ("Manual Throttle Duty Cycle")
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* and #14 ("Enabling and Disabling Manual Throttle"), plus
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* erratum #5 ("STPCLK# Deassertion Time") from the January
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* 2002 PIIX4 specification update. Note that few (if any)
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* mobile systems ever used this part.
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*/
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case PCI_REVISION_A_STEP:
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case PCI_REVISION_B_STEP:
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thr_quirks |= CPU_QUIRK_NO_THROTTLE;
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break;
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default:
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break;
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}
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}
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return (0);
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}
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static int
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acpi_thr_settings(device_t dev, struct cf_setting *sets, int *count)
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{
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int i, speed;
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if (sets == NULL || count == NULL)
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return (EINVAL);
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if (*count < CPU_MAX_SPEED)
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return (E2BIG);
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/* Return a list of valid settings for this driver. */
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memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * CPU_MAX_SPEED);
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for (i = 0, speed = CPU_MAX_SPEED; speed != 0; i++, speed--) {
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sets[i].freq = CPU_SPEED_PERCENT(speed);
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sets[i].dev = dev;
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}
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*count = CPU_MAX_SPEED;
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return (0);
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}
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static int
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acpi_thr_set(device_t dev, const struct cf_setting *set)
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{
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struct acpi_throttle_softc *sc;
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uint32_t clk_val, p_cnt, speed;
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if (set == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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/*
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* Validate requested state converts to a duty cycle that is an
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* integer from [1 .. CPU_MAX_SPEED].
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*/
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speed = set->freq * CPU_MAX_SPEED / 10000;
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if (speed * 10000 != set->freq * CPU_MAX_SPEED ||
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speed < 1 || speed > CPU_MAX_SPEED)
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return (EINVAL);
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/* If we're at this setting, don't bother applying it again. */
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if (speed == sc->cpu_thr_state)
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return (0);
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/* Get the current P_CNT value and disable throttling */
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p_cnt = THR_GET_REG(sc->cpu_p_cnt);
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p_cnt &= ~CPU_P_CNT_THT_EN;
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THR_SET_REG(sc->cpu_p_cnt, p_cnt);
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/* If we're at maximum speed, that's all */
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if (speed < CPU_MAX_SPEED) {
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/* Mask the old CLK_VAL off and OR in the new value */
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clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset;
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p_cnt &= ~clk_val;
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p_cnt |= (speed << cpu_duty_offset);
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/* Write the new P_CNT value and then enable throttling */
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THR_SET_REG(sc->cpu_p_cnt, p_cnt);
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p_cnt |= CPU_P_CNT_THT_EN;
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THR_SET_REG(sc->cpu_p_cnt, p_cnt);
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}
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sc->cpu_thr_state = speed;
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return (0);
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}
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static int
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acpi_thr_get(device_t dev, struct cf_setting *set)
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{
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struct acpi_throttle_softc *sc;
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uint32_t p_cnt, clk_val;
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if (set == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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/* Get the current throttling setting from P_CNT. */
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p_cnt = THR_GET_REG(sc->cpu_p_cnt);
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clk_val = (p_cnt >> cpu_duty_offset) & (CPU_MAX_SPEED - 1);
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sc->cpu_thr_state = clk_val;
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memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set));
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set->freq = CPU_SPEED_PERCENT(clk_val);
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set->dev = dev;
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return (0);
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}
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static int
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acpi_thr_type(device_t dev, int *type)
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{
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if (type == NULL)
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return (EINVAL);
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*type = CPUFREQ_TYPE_RELATIVE;
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return (0);
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}
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