171 lines
6.2 KiB
C
171 lines
6.2 KiB
C
/* $NetBSD: ixdp425_pci.c,v 1.5 2005/12/11 12:17:09 christos Exp $ */
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/*
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* Copyright (c) 2003
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* Ichiro FUKUHARA <ichiro@ichiro.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Ichiro FUKUHARA.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <arm/xscale/ixp425/ixp425reg.h>
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#include <arm/xscale/ixp425/ixp425var.h>
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#include <arm/xscale/ixp425/ixp425_intr.h>
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#include <arm/xscale/ixp425/ixdp425reg.h>
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void
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ixp425_md_attach(device_t dev)
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{
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struct ixp425_softc *sc = device_get_softc(device_get_parent(dev));
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struct ixppcib_softc *pci_sc = device_get_softc(dev);
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uint32_t reg;
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/* PCI Reset Assert */
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reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
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reg &= ~(1U << GPIO_PCI_RESET);
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);
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/* PCI Clock Disable */
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reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPCLKR);
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reg &= ~GPCLKR_MUX14;
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPCLKR, reg);
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/*
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* set GPIO Direction
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* Output: PCI_CLK, PCI_RESET
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* Input: PCI_INTA, PCI_INTB, PCI_INTC, PCI_INTD
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*/
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reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
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reg &= ~(1U << GPIO_PCI_CLK);
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reg &= ~(1U << GPIO_PCI_RESET);
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reg |= ((1U << GPIO_PCI_INTA) | (1U << GPIO_PCI_INTB) |
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(1U << GPIO_PCI_INTC) | (1U << GPIO_PCI_INTD));
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, reg);
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/*
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* Set GPIO interrupt type
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* PCI_INT_A, PCI_INTB, PCI_INT_C, PCI_INT_D: Active Low
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*/
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reg = GPIO_CONF_READ_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTA));
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reg &= ~GPIO_TYPE(GPIO_PCI_INTA, GPIO_TYPE_MASK);
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reg |= GPIO_TYPE(GPIO_PCI_INTA, GPIO_TYPE_ACT_LOW);
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GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTA), reg);
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reg = GPIO_CONF_READ_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTB));
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reg &= ~GPIO_TYPE(GPIO_PCI_INTB, GPIO_TYPE_MASK);
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reg |= GPIO_TYPE(GPIO_PCI_INTB, GPIO_TYPE_ACT_LOW);
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GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTB), reg);
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reg = GPIO_CONF_READ_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTC));
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reg &= ~GPIO_TYPE(GPIO_PCI_INTC, GPIO_TYPE_MASK);
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reg |= GPIO_TYPE(GPIO_PCI_INTC, GPIO_TYPE_ACT_LOW);
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GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTC), reg);
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reg = GPIO_CONF_READ_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTD));
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reg &= ~GPIO_TYPE(GPIO_PCI_INTD, GPIO_TYPE_MASK);
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reg |= GPIO_TYPE(GPIO_PCI_INTD, GPIO_TYPE_ACT_LOW);
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GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(GPIO_PCI_INTD), reg);
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/* clear ISR */
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPISR,
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(1U << GPIO_PCI_INTA) | (1U << GPIO_PCI_INTB) |
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(1U << GPIO_PCI_INTC) | (1U << GPIO_PCI_INTD));
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/* wait 1ms to satisfy "minimum reset assertion time" of the PCI spec */
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DELAY(1000);
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reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPCLKR);
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPCLKR, reg |
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(0xf << GPCLKR_CLK0DC_SHIFT) | (0xf << GPCLKR_CLK0TC_SHIFT));
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/* PCI Clock Enable */
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reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPCLKR);
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reg |= GPCLKR_MUX14;
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPCLKR, reg | GPCLKR_MUX14);
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/*
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* wait 100us to satisfy "minimum reset assertion time from clock stable
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* requirement of the PCI spec
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*/
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DELAY(100);
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/* PCI Reset deassert */
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reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
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reg |= 1U << GPIO_PCI_RESET;
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GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg | (1U << GPIO_PCI_RESET));
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pci_sc->sc_irq_rman.rm_type = RMAN_ARRAY;
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pci_sc->sc_irq_rman.rm_descr = "IXP425 PCI IRQs";
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CTASSERT(PCI_INT_D < PCI_INT_A);
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/* XXX this overlaps the irq's setup in ixp425_attach */
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if (rman_init(&pci_sc->sc_irq_rman) != 0 ||
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rman_manage_region(&pci_sc->sc_irq_rman, PCI_INT_D, PCI_INT_A) != 0)
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panic("ixp425_md_attach: failed to set up IRQ rman");
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}
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#define IXP425_MAX_DEV 5
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#define IXP425_MAX_LINE 4
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int
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ixp425_md_route_interrupt(device_t bridge, device_t device, int pin)
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{
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static int ixp425_pci_table[IXP425_MAX_DEV][IXP425_MAX_LINE] = {
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{PCI_INT_A, PCI_INT_B, PCI_INT_C, PCI_INT_D},
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{PCI_INT_B, PCI_INT_C, PCI_INT_D, PCI_INT_A},
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{PCI_INT_C, PCI_INT_D, PCI_INT_A, PCI_INT_B},
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{PCI_INT_D, PCI_INT_A, PCI_INT_B, PCI_INT_C},
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/* NB: for optional USB controller on Gateworks Avila */
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{PCI_INT_A, PCI_INT_B, PCI_INT_C, PCI_INT_D},
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};
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int dev;
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dev = pci_get_slot(device);
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if (bootverbose)
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device_printf(bridge, "routing pin %d for %s\n", pin,
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device_get_nameunit(device));
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if (pin >= 1 && pin <= IXP425_MAX_LINE &&
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dev >= 1 && dev <= IXP425_MAX_DEV) {
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return (ixp425_pci_table[dev - 1][pin - 1]);
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} else
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printf("ixppcib: no mapping for %d/%d/%d\n",
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pci_get_bus(device), dev, pci_get_function(device));
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return (-1);
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}
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