bb5bdd386e
This moves all chipset specific code to a new file 'ata-chipset.c'. Extensive use of tables and pointers to avoid having the same switch on chipset type in several places, and to allow substituting various functions for different HW arch needs. Added PIO mode setup and all DMA modes. Support for all known SiS chipsets. Thanks to Christoph Kukulies for sponsoring a nice ASUS P4S8X SiS648 based board for this work! Tested on: i386, PC98, alpha and sparc64
305 lines
8.8 KiB
C
305 lines
8.8 KiB
C
/*-
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* Copyright (c) 1998 - 2003 Søren Schmidt <sos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ata.h>
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#include <sys/kernel.h>
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#include <sys/endian.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <pci/pcivar.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <dev/ata/ata-all.h>
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#include <dev/ata/ata-pci.h>
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/* prototypes */
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static void ata_dmasetupc_cb(void *, bus_dma_segment_t *, int, int);
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static int ata_dmaalloc(struct ata_device *);
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static void ata_dmafree(struct ata_device *);
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static void ata_dmacreate(struct ata_channel *);
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static void ata_dmadestroy(struct ata_channel *);
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static void ata_dmasetupd_cb(void *, bus_dma_segment_t *, int, int);
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static int ata_dmasetup(struct ata_device *, caddr_t, int32_t);
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/*
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static int ata_dmastart(struct ata_device *, caddr_t, int32_t, int);
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static int ata_dmastop(struct ata_device *);
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*/
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static int ata_dmastatus(struct ata_channel *);
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/* local vars */
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static MALLOC_DEFINE(M_ATADMA, "ATA DMA", "ATA driver DMA");
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/* misc defines */
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#define MAXSEGSZ PAGE_SIZE
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#define MAXTABSZ PAGE_SIZE
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#define MAXCTLDMASZ (2 * (MAXTABSZ + MAXPHYS))
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struct ata_dc_cb_args {
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bus_addr_t maddr;
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int error;
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};
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int
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ata_dmainit(struct ata_channel *ch)
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{
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if (!(ch->dma =
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malloc(sizeof(struct ata_dma_funcs), M_ATADMA, M_NOWAIT | M_ZERO)))
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return ENOMEM;
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ch->dma->create = ata_dmacreate;
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ch->dma->destroy = ata_dmadestroy;
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ch->dma->alloc = ata_dmaalloc;
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ch->dma->free = ata_dmafree;
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ch->dma->setup = ata_dmasetup;
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ch->dma->start = ata_dmastart;
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ch->dma->stop = ata_dmastop;
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ch->dma->status = ata_dmastatus;
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ch->dma->alignment = 2;
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return 0;
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}
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static void
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ata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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{
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struct ata_dc_cb_args *cba = (struct ata_dc_cb_args *)xsc;
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if (!(cba->error = error))
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cba->maddr = segs[0].ds_addr;
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}
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static int
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ata_dmaalloc(struct ata_device *atadev)
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{
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struct ata_channel *ch;
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struct ata_dc_cb_args ccba;
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struct ata_dmastate *ds;
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int error;
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ch = atadev->channel;
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ds = &atadev->dmastate;
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if (!ds->cdmatag) {
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if ((error = bus_dma_tag_create(ch->dmatag, 1, PAGE_SIZE,
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BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL,
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MAXTABSZ, 1, MAXTABSZ,
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BUS_DMA_ALLOCNOW, &ds->cdmatag)))
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return error;
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}
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if (!ds->ddmatag) {
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if ((error = bus_dma_tag_create(ch->dmatag, ch->dma->alignment, 0,
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BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL,
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MAXPHYS, ATA_DMA_ENTRIES, MAXSEGSZ,
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BUS_DMA_ALLOCNOW, &ds->ddmatag)))
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return error;
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}
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if (!ds->mdmatab) {
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if ((error = bus_dmamem_alloc(ds->cdmatag, (void **)&ds->dmatab, 0,
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&ds->cdmamap)))
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return error;
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if ((error = bus_dmamap_load(ds->cdmatag, ds->cdmamap, ds->dmatab,
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MAXTABSZ, ata_dmasetupc_cb, &ccba,
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0)) != 0 || ccba.error != 0) {
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bus_dmamem_free(ds->cdmatag, ds->dmatab, ds->cdmamap);
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return error;
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}
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ds->mdmatab = ccba.maddr;
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}
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if (!ds->ddmamap) {
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if ((error = bus_dmamap_create(ds->ddmatag, 0, &ds->ddmamap)) != 0)
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return error;
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}
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return 0;
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}
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static void
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ata_dmafree(struct ata_device *atadev)
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{
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struct ata_dmastate *ds;
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ds = &atadev->dmastate;
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if (ds->mdmatab) {
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bus_dmamap_unload(ds->cdmatag, ds->cdmamap);
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bus_dmamem_free(ds->cdmatag, ds->dmatab, ds->cdmamap);
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ds->mdmatab = 0;
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ds->cdmamap = NULL;
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ds->dmatab = NULL;
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}
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if (ds->ddmamap) {
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bus_dmamap_destroy(ds->ddmatag, ds->ddmamap);
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ds->ddmamap = NULL;
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}
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if (ds->cdmatag) {
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bus_dma_tag_destroy(ds->cdmatag);
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ds->cdmatag = NULL;
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}
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if (ds->ddmatag) {
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bus_dma_tag_destroy(ds->ddmatag);
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ds->ddmatag = NULL;
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}
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}
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static void
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ata_dmacreate(struct ata_channel *ch)
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{
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if (!ch->dmatag) {
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if (bus_dma_tag_create(NULL, 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
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NULL, NULL, MAXCTLDMASZ, ATA_DMA_ENTRIES,
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BUS_SPACE_MAXSIZE_32BIT, 0, &ch->dmatag)) {
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printf("DMA tag allocation failed, disabling DMA\n");
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}
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}
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}
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static void
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ata_dmadestroy(struct ata_channel *ch)
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{
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if (ch->dmatag) {
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bus_dma_tag_destroy(ch->dmatag);
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ch->dmatag = NULL;
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}
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}
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struct ata_dmasetup_data_cb_args {
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struct ata_dmaentry *dmatab;
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int error;
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};
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static void
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ata_dmasetupd_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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{
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struct ata_dmasetup_data_cb_args *cba =
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(struct ata_dmasetup_data_cb_args *)xsc;
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bus_size_t cnt;
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u_int32_t lastcount;
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int i, j;
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cba->error = error;
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if (error != 0)
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return;
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lastcount = j = 0;
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for (i = 0; i < nsegs; i++) {
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/*
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* A maximum segment size was specified for bus_dma_tag_create, but
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* some busdma code does not seem to honor this, so fix up if needed.
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*/
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for (cnt = 0; cnt < segs[i].ds_len; cnt += MAXSEGSZ, j++) {
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cba->dmatab[j].base = htole32(segs[i].ds_addr + cnt);
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lastcount = ulmin(segs[i].ds_len - cnt, MAXSEGSZ) & 0xffff;
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cba->dmatab[j].count = htole32(lastcount);
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}
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}
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cba->dmatab[j - 1].count = htole32(lastcount | ATA_DMA_EOT);
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}
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static int
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ata_dmasetup(struct ata_device *atadev, caddr_t data, int32_t count)
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{
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struct ata_channel *ch = atadev->channel;
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if (((uintptr_t)data & (ch->dma->alignment - 1)) ||
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(count & (ch->dma->alignment - 1))) {
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ata_prtdev(atadev, "non aligned DMA transfer attempted\n");
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return -1;
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}
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if (!count) {
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ata_prtdev(atadev, "zero length DMA transfer attempted\n");
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return -1;
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}
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return 0;
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}
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int
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ata_dmastart(struct ata_device *atadev, caddr_t data, int32_t count, int dir)
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{
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struct ata_channel *ch = atadev->channel;
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struct ata_dmastate *ds = &atadev->dmastate;
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struct ata_dmasetup_data_cb_args cba;
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if (ds->flags & ATA_DS_ACTIVE)
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panic("ata_dmasetup: transfer active on this device!");
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cba.dmatab = ds->dmatab;
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bus_dmamap_sync(ds->cdmatag, ds->cdmamap, BUS_DMASYNC_PREWRITE);
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if (bus_dmamap_load(ds->ddmatag, ds->ddmamap, data, count,
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ata_dmasetupd_cb, &cba, 0) || cba.error)
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return -1;
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bus_dmamap_sync(ds->cdmatag, ds->cdmamap, BUS_DMASYNC_POSTWRITE);
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bus_dmamap_sync(ds->ddmatag, ds->ddmamap, dir ? BUS_DMASYNC_PREREAD :
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BUS_DMASYNC_PREWRITE);
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ch->flags |= ATA_DMA_ACTIVE;
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ds->flags = dir ? (ATA_DS_ACTIVE | ATA_DS_READ) : ATA_DS_ACTIVE;
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ATA_OUTL(ch->r_bmio, ATA_BMDTP_PORT, ds->mdmatab);
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ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0);
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ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT,
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(ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) |
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(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
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ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT,
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ATA_INB(ch->r_bmio, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
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return 0;
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}
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int
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ata_dmastop(struct ata_device *atadev)
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{
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struct ata_channel *ch = atadev->channel;
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struct ata_dmastate *ds = &atadev->dmastate;
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int error;
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error = ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT);
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ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT,
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ATA_INB(ch->r_bmio, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
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ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT,ATA_BMSTAT_INTERRUPT|ATA_BMSTAT_ERROR);
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bus_dmamap_sync(ds->ddmatag, ds->ddmamap, (ds->flags & ATA_DS_READ) != 0 ?
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BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(ds->ddmatag, ds->ddmamap);
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ch->flags &= ~ATA_DMA_ACTIVE;
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ds->flags = 0;
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return (error & ATA_BMSTAT_MASK);
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}
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static int
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ata_dmastatus(struct ata_channel *ch)
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{
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return ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
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}
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