010441d9d3
The recursive ownership support added in r321584 was unconditionally in effect all the time -- whenever a given i2c slave device instance tried to lock the i2c bus for exclusive use when it already owned the bus, the call returned immediately without waiting. However, many i2c slave drivers use bus ownership to enforce that only a single thread at a time can be using the slave device. The recursive locking changes broke this use case. Now there is a new flag, IIC_RECURSIVE, which can be mixed in with the other flags passed to iicbus_acquire_bus() to allow drivers to indicate when recursive locking is desired. Using the flag implies that the driver is managing concurrent access to the device by different threads in some way. This immediately fixes all existing i2c slave drivers except for the two i2c RTC drivers which use the recursive locking feature; those will be fixed in a followup commit.
163 lines
5.4 KiB
C
163 lines
5.4 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 1998, 2001 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __IICONF_H
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#define __IICONF_H
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#include <sys/queue.h>
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#include <dev/iicbus/iic.h>
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#define IICPRI (PZERO+8) /* XXX sleep/wakeup queue priority */
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#define LSB 0x1
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/*
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* Options affecting iicbus_request_bus()
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*/
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#define IIC_DONTWAIT 0
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#define IIC_NOINTR 0
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#define IIC_WAIT 0x1
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#define IIC_INTR 0x2
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#define IIC_INTRWAIT (IIC_INTR | IIC_WAIT)
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#define IIC_RECURSIVE 0x4
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/*
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* i2c modes
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*/
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#define IIC_MASTER 0x1
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#define IIC_SLAVE 0x2
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#define IIC_POLLED 0x4
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/*
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* i2c speed
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*/
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#define IIC_UNKNOWN 0x0
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#define IIC_SLOW 0x1
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#define IIC_FAST 0x2
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#define IIC_FASTEST 0x3
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#define IIC_LAST_READ 0x1
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/*
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* callback index
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*/
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#define IIC_REQUEST_BUS 0x1
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#define IIC_RELEASE_BUS 0x2
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/*
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* interrupt events
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*/
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#define INTR_GENERAL 0x1 /* general call received */
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#define INTR_START 0x2 /* the I2C interface is addressed */
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#define INTR_STOP 0x3 /* stop condition received */
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#define INTR_RECEIVE 0x4 /* character received */
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#define INTR_TRANSMIT 0x5 /* character to transmit */
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#define INTR_ERROR 0x6 /* error */
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#define INTR_NOACK 0x7 /* no ack from master receiver */
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/*
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* adapter layer errors
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*/
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#define IIC_NOERR 0x0 /* no error occurred */
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#define IIC_EBUSERR 0x1 /* bus error (hardware not in expected state) */
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#define IIC_ENOACK 0x2 /* ack not received until timeout */
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#define IIC_ETIMEOUT 0x3 /* timeout */
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#define IIC_EBUSBSY 0x4 /* bus busy (reserved by another client) */
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#define IIC_ESTATUS 0x5 /* status error */
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#define IIC_EUNDERFLOW 0x6 /* slave ready for more data */
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#define IIC_EOVERFLOW 0x7 /* too much data */
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#define IIC_ENOTSUPP 0x8 /* request not supported */
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#define IIC_ENOADDR 0x9 /* no address assigned to the interface */
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#define IIC_ERESOURCE 0xa /* resources (memory, whatever) unavailable */
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/*
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* Note that all iicbus functions return IIC_Exxxxx status values,
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* except iic2errno() (obviously) and iicbus_started() (returns bool).
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*/
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extern int iic2errno(int);
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extern int iicbus_request_bus(device_t, device_t, int);
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extern int iicbus_release_bus(device_t, device_t);
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extern device_t iicbus_alloc_bus(device_t);
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extern void iicbus_intr(device_t, int, char *);
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extern int iicbus_null_repeated_start(device_t, u_char);
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extern int iicbus_null_callback(device_t, int, caddr_t);
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#define iicbus_reset(bus,speed,addr,oldaddr) \
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(IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr))
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/* basic I2C operations */
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extern int iicbus_started(device_t);
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extern int iicbus_start(device_t, u_char, int);
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extern int iicbus_stop(device_t);
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extern int iicbus_repeated_start(device_t, u_char, int);
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extern int iicbus_write(device_t, const char *, int, int *, int);
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extern int iicbus_read(device_t, char *, int, int *, int, int);
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/* single byte read/write functions, start/stop not managed */
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extern int iicbus_write_byte(device_t, char, int);
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extern int iicbus_read_byte(device_t, char *, int);
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/* Read/write operations with start/stop conditions managed */
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extern int iicbus_block_write(device_t, u_char, char *, int, int *);
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extern int iicbus_block_read(device_t, u_char, char *, int, int *);
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/* vectors of iic operations to pass to bridge */
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int iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
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int iicbus_transfer_excl(device_t bus, struct iic_msg *msgs, uint32_t nmsgs,
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int how);
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int iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
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/*
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* Simple register read/write routines, but the "register" can be any size.
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* The transfers are done with iicbus_transfer_excl(). Reads use a repeat-start
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* between sending the address and reading; writes use a single start/stop.
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*/
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int iicdev_readfrom(device_t _slavedev, uint8_t _regaddr, void *_buffer,
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uint16_t _buflen, int _waithow);
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int iicdev_writeto(device_t _slavedev, uint8_t _regaddr, void *_buffer,
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uint16_t _buflen, int _waithow);
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#define IICBUS_MODVER 1
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#define IICBUS_MINVER 1
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#define IICBUS_MAXVER 1
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#define IICBUS_PREFVER IICBUS_MODVER
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extern driver_t iicbb_driver;
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extern devclass_t iicbb_devclass;
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#define IICBB_MODVER 1
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#define IICBB_MINVER 1
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#define IICBB_MAXVER 1
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#define IICBB_PREFVER IICBB_MODVER
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#endif
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