5fd5877aef
simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
278 lines
8.5 KiB
ArmAsm
278 lines
8.5 KiB
ArmAsm
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_npx.h"
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#include <machine/asmacros.h>
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#include <sys/mutex.h>
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#include <machine/atomic.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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#ifdef SMP
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#include <machine/smptests.h> /** various SMP options */
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#endif
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#include "assym.s"
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#define SEL_RPL_MASK 0x0003
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.text
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/*****************************************************************************/
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/* Trap handling */
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/*****************************************************************************/
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/*
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* Trap and fault vector routines.
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*
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* Most traps are 'trap gates', SDT_SYS386TGT. A trap gate pushes state on
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* the stack that mostly looks like an interrupt, but does not disable
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* interrupts. A few of the traps we are use are interrupt gates,
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* SDT_SYS386IGT, which are nearly the same thing except interrupts are
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* disabled on entry.
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*
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* The cpu will push a certain amount of state onto the kernel stack for
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* the current process. The amount of state depends on the type of trap
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* and whether the trap crossed rings or not. See i386/include/frame.h.
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* At the very least the current EFLAGS (status register, which includes
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* the interrupt disable state prior to the trap), the code segment register,
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* and the return instruction pointer are pushed by the cpu. The cpu
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* will also push an 'error' code for certain traps. We push a dummy
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* error code for those traps where the cpu doesn't in order to maintain
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* a consistent frame. We also push a contrived 'trap number'.
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*
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* The cpu does not push the general registers, we must do that, and we
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* must restore them prior to calling 'iret'. The cpu adjusts the %cs and
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* %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
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* must load them with appropriate values for supervisor mode operation.
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*
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* On entry to a trap or interrupt WE DO NOT OWN THE MP LOCK. This means
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* that we must be careful in regards to accessing global variables. We
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* save (push) the current cpl (our software interrupt disable mask), call
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* the trap function, then call doreti to restore the cpl and deal with
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* ASTs (software interrupts). doreti will determine if the restoration
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* of the cpl unmasked any pending interrupts and will issue those interrupts
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* synchronously prior to doing the iret.
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*
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* At the moment we must own the MP lock to do any cpl manipulation, which
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* means we must own it prior to calling doreti. The syscall case attempts
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* to avoid this by handling a reduced set of cases itself and iret'ing.
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*/
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#define IDTVEC(name) ALIGN_TEXT; .globl __CONCAT(X,name); \
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.type __CONCAT(X,name),@function; __CONCAT(X,name):
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#define TRAP(a) pushl $(a) ; jmp alltraps
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#ifdef BDE_DEBUGGER
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#define BDBTRAP(name) \
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ss ; \
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cmpb $0,_bdb_exists ; \
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je 1f ; \
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testb $SEL_RPL_MASK,4(%esp) ; \
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jne 1f ; \
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ss ; \
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.globl __CONCAT(__CONCAT(bdb_,name),_ljmp); \
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__CONCAT(__CONCAT(bdb_,name),_ljmp): \
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ljmp $0,$0 ; \
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1:
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#else
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#define BDBTRAP(name)
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#endif
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#define BPTTRAP(a) testl $PSL_I,4+8(%esp) ; je 1f ; sti ; 1: ; TRAP(a)
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MCOUNT_LABEL(user)
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MCOUNT_LABEL(btrap)
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IDTVEC(div)
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pushl $0; TRAP(T_DIVIDE)
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IDTVEC(dbg)
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BDBTRAP(dbg)
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pushl $0; BPTTRAP(T_TRCTRAP)
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IDTVEC(nmi)
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pushl $0; TRAP(T_NMI)
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IDTVEC(bpt)
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BDBTRAP(bpt)
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pushl $0; BPTTRAP(T_BPTFLT)
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IDTVEC(ofl)
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pushl $0; TRAP(T_OFLOW)
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IDTVEC(bnd)
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pushl $0; TRAP(T_BOUND)
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IDTVEC(ill)
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pushl $0; TRAP(T_PRIVINFLT)
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IDTVEC(dna)
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pushl $0; TRAP(T_DNA)
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IDTVEC(fpusegm)
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pushl $0; TRAP(T_FPOPFLT)
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IDTVEC(tss)
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TRAP(T_TSSFLT)
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IDTVEC(missing)
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TRAP(T_SEGNPFLT)
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IDTVEC(stk)
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TRAP(T_STKFLT)
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IDTVEC(prot)
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TRAP(T_PROTFLT)
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IDTVEC(page)
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TRAP(T_PAGEFLT)
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IDTVEC(mchk)
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pushl $0; TRAP(T_MCHK)
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IDTVEC(rsvd)
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pushl $0; TRAP(T_RESERVED)
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IDTVEC(fpu)
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pushl $0; TRAP(T_ARITHTRAP)
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IDTVEC(align)
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TRAP(T_ALIGNFLT)
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/*
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* alltraps entry point. Interrupts are enabled if this was a trap
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* gate (TGT), else disabled if this was an interrupt gate (IGT).
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* Note that int0x80_syscall is a trap gate. Only page faults
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* use an interrupt gate.
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*/
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SUPERALIGN_TEXT
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.globl alltraps
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.type alltraps,@function
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alltraps:
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pushal
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pushl %ds
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pushl %es
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pushl %fs
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alltraps_with_regs_pushed:
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mov $KDSEL,%ax
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mov %ax,%ds
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mov %ax,%es
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mov $KPSEL,%ax
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mov %ax,%fs
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FAKE_MCOUNT(13*4(%esp))
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calltrap:
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FAKE_MCOUNT(btrap) /* init "from" btrap -> calltrap */
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call trap
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/*
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* Return via doreti to handle ASTs.
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*/
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MEXITCOUNT
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jmp doreti
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/*
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* SYSCALL CALL GATE (old entry point for a.out binaries)
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*
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* The intersegment call has been set up to specify one dummy parameter.
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*
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* This leaves a place to put eflags so that the call frame can be
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* converted to a trap frame. Note that the eflags is (semi-)bogusly
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* pushed into (what will be) tf_err and then copied later into the
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* final spot. It has to be done this way because esp can't be just
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* temporarily altered for the pushfl - an interrupt might come in
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* and clobber the saved cs/eip.
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*
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* We do not obtain the MP lock, but the call to syscall might. If it
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* does it will release the lock prior to returning.
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*/
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SUPERALIGN_TEXT
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IDTVEC(lcall_syscall)
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pushfl /* save eflags */
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popl 8(%esp) /* shuffle into tf_eflags */
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pushl $7 /* sizeof "lcall 7,0" */
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jmp syscall_with_err_pushed
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/*
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* Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80)
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*
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* Even though the name says 'int0x80', this is actually a TGT (trap gate)
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* rather then an IGT (interrupt gate). Thus interrupts are enabled on
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* entry just as they are for a normal syscall.
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*
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* We do not obtain the MP lock, but the call to syscall might. If it
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* does it will release the lock prior to returning.
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*/
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SUPERALIGN_TEXT
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IDTVEC(int0x80_syscall)
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pushl $2 /* sizeof "int 0x80" */
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syscall_with_err_pushed:
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subl $4,%esp /* skip over tf_trapno */
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pushal
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pushl %ds
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pushl %es
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pushl %fs
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mov $KDSEL,%ax /* switch to kernel segments */
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mov %ax,%ds
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mov %ax,%es
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mov $KPSEL,%ax
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mov %ax,%fs
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FAKE_MCOUNT(13*4(%esp))
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call syscall
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MEXITCOUNT
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jmp doreti
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ENTRY(fork_trampoline)
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pushl %esp /* trapframe pointer */
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pushl %ebx /* arg1 */
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pushl %esi /* function */
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call fork_exit
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addl $12,%esp
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/* cut from syscall */
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/*
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* Return via doreti to handle ASTs.
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*/
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MEXITCOUNT
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jmp doreti
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/*
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* Include vm86 call routines, which want to call doreti.
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*/
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#include "i386/i386/vm86bios.s"
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/*
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* Include what was once config+isa-dependent code.
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* XXX it should be in a stand-alone file. It's still icu-dependent and
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* belongs in i386/isa.
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*/
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#include "i386/isa/vector.s"
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/*
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* Include what was once icu-dependent code.
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* XXX it should be merged into this file (also move the definition of
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* imen to vector.s or isa.c).
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* Before including it, set up a normal asm environment so that vector.s
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* doesn't have to know that stuff is included after it.
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*/
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.data
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ALIGN_DATA
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.text
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SUPERALIGN_TEXT
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#include "i386/isa/ipl.s"
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