304 lines
9.9 KiB
C
304 lines
9.9 KiB
C
/*
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* Interface to the generic driver for the aic7xxx based adaptec
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* SCSI controllers. This is used to implement product specific
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* probe and attach routines.
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*
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* Copyright (c) 1994, 1995, 1996 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: aic7xxx.h,v 1.28 1996/05/30 07:19:59 gibbs Exp $
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*/
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#ifndef _AIC7XXX_H_
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#define _AIC7XXX_H_
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#if defined(__FreeBSD__)
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#include "ahc.h" /* for NAHC from config */
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#endif
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#if defined(__NetBSD__)
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/*
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* convert FreeBSD's <sys/queue.h> symbols to NetBSD's
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*/
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#define STAILQ_ENTRY SIMPLEQ_ENTRY
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#define STAILQ_HEAD SIMPLEQ_HEAD
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#define STAILQ_INIT SIMPLEQ_INIT
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#define STAILQ_INSERT_HEAD SIMPLEQ_INSERT_HEAD
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#define STAILQ_INSERT_TAIL SIMPLEQ_INSERT_TAIL
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#define STAILQ_REMOVE_HEAD(head, field) \
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SIMPLEQ_REMOVE_HEAD(head, (head)->sqh_first, field)
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#define stqh_first sqh_first
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#define stqe_next sqe_next
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#endif
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#if defined(__FreeBSD__)
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#define AHC_INB(ahc, port) \
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inb((ahc)->baseport+(port))
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#define AHC_INSB(ahc, port, valp, size) \
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insb((ahc)->baseport+(port), valp, size)
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#define AHC_OUTB(ahc, port, val) \
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outb((ahc)->baseport+(port), val)
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#define AHC_OUTSB(ahc, port, valp, size) \
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outsb((ahc)->baseport+(port), valp, size)
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#define AHC_OUTSL(ahc, port, valp, size) \
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outsl((ahc)->baseport+(port), valp, size)
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#elif defined(__NetBSD__)
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#define AHC_INB(ahc, port) \
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bus_io_read_1((ahc)->sc_bc, (ahc)->sc_ioh, port)
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#define AHC_INSB(ahc, port, valp, size) \
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bus_io_read_multi_1((ahc)->sc_bc, (ahc)->sc_ioh, port, valp, size)
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#define AHC_OUTB(ahc, port, val) \
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bus_io_write_1((ahc)->sc_bc, (ahc)->sc_ioh, port, val)
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#define AHC_OUTSB(ahc, port, valp, size) \
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bus_io_write_multi_1((ahc)->sc_bc, (ahc)->sc_ioh, port, valp, size)
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#define AHC_OUTSL(ahc, port, valp, size) \
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bus_io_write_multi_4((ahc)->sc_bc, (ahc)->sc_ioh, port, valp, size)
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#endif
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#define AHC_NSEG 256 /* number of dma segments supported */
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#define AHC_SCB_MAX 255 /*
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* Up to 255 SCBs on some types of aic7xxx
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* based boards. The aic7870 have 16 internal
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* SCBs, but external SRAM bumps this to 255.
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* The aic7770 family have only 4, and the
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* aic7850 has only 3.
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*/
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typedef u_int32_t physaddr;
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#if defined(__FreeBSD__)
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extern u_long ahc_unit;
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#endif
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struct ahc_dma_seg {
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physaddr addr;
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u_int32_t len;
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};
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typedef enum {
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AHC_NONE = 0x000,
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AHC_ULTRA = 0x001, /* Supports 20MHz Transfers */
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AHC_WIDE = 0x002, /* Wide Channel */
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AHC_TWIN = 0x008, /* Twin Channel */
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AHC_AIC7770 = 0x010,
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AHC_AIC7850 = 0x020,
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AHC_AIC7860 = 0x021, /* ULTRA version of the aic7850 */
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AHC_AIC7870 = 0x040,
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AHC_AIC7880 = 0x041,
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AHC_AIC78X0 = 0x060, /* PCI Based Controller */
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AHC_274 = 0x110, /* EISA Based Controller */
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AHC_284 = 0x210, /* VL/ISA Based Controller */
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AHC_294AU = 0x421, /* aic7860 based '2940' */
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AHC_294 = 0x440, /* PCI Based Controller */
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AHC_294U = 0x441, /* ULTRA PCI Based Controller */
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AHC_394 = 0x840, /* Twin Channel PCI Controller */
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AHC_394U = 0x841, /* Twin, ULTRA Channel PCI Controller */
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}ahc_type;
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typedef enum {
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AHC_FNONE = 0x00,
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AHC_INIT = 0x01,
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AHC_RUNNING = 0x02,
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AHC_PAGESCBS = 0x04, /* Enable SCB paging */
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AHC_CHANNEL_B_PRIMARY = 0x08, /*
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* On twin channel adapters, probe
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* channel B first since it is the
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* primary bus.
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*/
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AHC_USEDEFAULTS = 0x10, /*
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* For cards without an seeprom
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* or a BIOS to initialize the chip's
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* SRAM, we use the default target
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* settings.
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*/
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AHC_CHNLB = 0x20, /*
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* Second controller on 3940
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* Also encodes the offset in the
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* SEEPROM for CHNLB info (32)
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*/
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}ahc_flag;
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typedef enum {
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SCB_FREE = 0x0000,
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SCB_ACTIVE = 0x0001,
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SCB_ABORTED = 0x0002,
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SCB_DEVICE_RESET = 0x0004,
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SCB_IMMED = 0x0008,
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SCB_SENSE = 0x0010,
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SCB_TIMEDOUT = 0x0020,
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SCB_QUEUED_FOR_DONE = 0x0040,
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SCB_PAGED_OUT = 0x0080,
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SCB_WAITINGQ = 0x0100,
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SCB_ASSIGNEDQ = 0x0200,
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SCB_SENTORDEREDTAG = 0x0400,
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SCB_MSGOUT_SDTR = 0x0800,
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SCB_MSGOUT_WDTR = 0x1000
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}scb_flag;
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/*
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* The driver keeps up to MAX_SCB scb structures per card in memory. Only the
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* first 28 bytes of the structure need to be transfered to the card during
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* normal operation. The fields starting at byte 28 are used for kernel level
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* bookkeeping.
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*/
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struct scb {
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/* ------------ Begin hardware supported fields ---------------- */
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/*0*/ u_char control;
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/*1*/ u_char tcl; /* 4/1/3 bits */
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/*2*/ u_char status;
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/*3*/ u_char SG_segment_count;
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/*4*/ physaddr SG_list_pointer;
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/*8*/ u_char residual_SG_segment_count;
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/*9*/ u_char residual_data_count[3];
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/*12*/ physaddr data;
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/*16*/ u_int32_t datalen; /* Really only three bits, but its
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* faster to treat it as a long on
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* a quad boundary.
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*/
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/*20*/ physaddr cmdpointer;
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/*24*/ u_char cmdlen;
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/*25*/ u_char tag; /* Index into our kernel SCB array.
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* Also used as the tag for tagged I/O
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*/
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#define SCB_PIO_TRANSFER_SIZE 26 /* amount we need to upload/download
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* via PIO to initialize a transaction.
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*/
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/*26*/ u_char next; /* Used for threading SCBs in the
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* "Waiting for Selection" and
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* "Disconnected SCB" lists down
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* in the sequencer.
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*/
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/*27*/ u_char prev;
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/*-----------------end of hardware supported fields----------------*/
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STAILQ_ENTRY(scb) links; /* for chaining */
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struct scsi_xfer *xs; /* the scsi_xfer for this cmd */
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scb_flag flags;
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u_char position; /* Position in card's scbarray */
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struct ahc_dma_seg ahc_dma[AHC_NSEG] __attribute__ ((packed));
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struct scsi_sense sense_cmd; /* SCSI command block */
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};
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struct ahc_data {
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#if defined(__FreeBSD__)
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int unit;
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#elif defined(__NetBSD__)
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struct device sc_dev;
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void *sc_ih;
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bus_chipset_tag_t sc_bc;
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bus_io_handle_t sc_ioh;
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#endif
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ahc_type type;
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ahc_flag flags;
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#if defined(__FreeBSD__)
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u_long baseport;
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#endif
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struct scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */
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struct scb *pagedout_ntscbs[16];/*
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* Paged out, non-tagged scbs
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* indexed by target.
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*/
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STAILQ_HEAD(, scb) free_scbs; /*
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* SCBs assigned to free slots
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* on the card. (no paging required)
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*/
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STAILQ_HEAD(, scb) page_scbs; /*
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* SCBs that will require paging
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* before use (no assigned slot)
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*/
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STAILQ_HEAD(, scb) waiting_scbs;/*
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* SCBs waiting to be paged in
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* and started.
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*/
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STAILQ_HEAD(, scb)assigned_scbs;/*
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* SCBs that were waiting but have
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* now been assigned a slot by
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* ahc_free_scb.
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*/
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struct scsi_link sc_link;
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struct scsi_link sc_link_b; /* Second bus for Twin channel cards */
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u_short needsdtr_orig; /* Targets we initiate sync neg with */
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u_short needwdtr_orig; /* Targets we initiate wide neg with */
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u_short needsdtr; /* Current list of negotiated targets */
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u_short needwdtr; /* Current list of negotiated targets */
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u_short sdtrpending; /* Pending SDTR to these targets */
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u_short wdtrpending; /* Pending WDTR to these targets */
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u_short tagenable; /* Targets that can handle tagqueing */
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u_short orderedtag; /* Targets to use ordered tag on */
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u_short discenable; /* Targets allowed to disconnect */
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u_char our_id; /* our scsi id */
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u_char our_id_b; /* B channel scsi id */
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u_char numscbs;
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u_char activescbs;
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u_char maxhscbs; /* Number of SCBs on the card */
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u_char maxscbs; /*
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* Max SCBs we allocate total including
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* any that will force us to page SCBs
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*/
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u_char qcntmask;
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u_char unpause;
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u_char pause;
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u_char in_timeout;
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};
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/* #define AHC_DEBUG */
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#ifdef AHC_DEBUG
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/* Different debugging levels used when AHC_DEBUG is defined */
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#define AHC_SHOWMISC 0x0001
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#define AHC_SHOWCMDS 0x0002
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#define AHC_SHOWSCBS 0x0004
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#define AHC_SHOWABORTS 0x0008
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#define AHC_SHOWSENSE 0x0010
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#define AHC_SHOWSCBCNT 0x0020
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extern int ahc_debug; /* Initialized in i386/scsi/aic7xxx.c */
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#endif
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#if defined(__FreeBSD__)
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char *ahc_name __P((struct ahc_data *ahc));
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void ahc_reset __P((u_long iobase));
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struct ahc_data *ahc_alloc __P((int unit, u_long io_base, ahc_type type, ahc_flag flags));
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#elif defined(__NetBSD__)
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#define ahc_name(ahc) (ahc)->sc_dev.dv_xname
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void ahc_reset __P((char *devname, bus_chipset_tag_t bc, bus_io_handle_t ioh));
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void ahc_construct __P((struct ahc_data *ahc, bus_chipset_tag_t bc, bus_io_handle_t ioh, ahc_type type, ahc_flag flags));
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#endif
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void ahc_free __P((struct ahc_data *));
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int ahc_init __P((struct ahc_data *));
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int ahc_attach __P((struct ahc_data *));
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#if defined(__FreeBSD__)
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void ahc_intr __P((void *arg));
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#elif defined(__NetBSD__)
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int ahc_intr __P((void *arg));
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#endif
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#endif /* _AIC7XXX_H_ */
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