7e54723f10
On my PIIX4 chip rev 1 this is required. Have not had any complaints from other people so it might be a problem with this stepping.
237 lines
7.5 KiB
C
237 lines
7.5 KiB
C
/* FreeBSD $Id: uhci_pci.c,v 1.1 1999/02/18 21:42:19 n_hibma Exp $ */
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/*
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Lennart Augustsson (augustss@carlstedt.se) at
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* Carlstedt Research & Technology.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/queue.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#define PCI_CLASS_SERIALBUS 0x0c000000
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#define PCI_SUBCLASS_COMMUNICATIONS_SERIAL 0x00000000
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#define PCI_SUBCLASS_SERIALBUS_FIREWIRE 0x00000000
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#define PCI_SUBCLASS_SERIALBUS_ACCESS 0x00010000
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#define PCI_SUBCLASS_SERIALBUS_SSA 0x00020000
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#define PCI_SUBCLASS_SERIALBUS_USB 0x00030000
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#define PCI_SUBCLASS_SERIALBUS_FIBER 0x00040000
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usbdivar.h>
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#include <dev/usb/usb_mem.h>
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#include <dev/usb/uhcireg.h>
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#include <dev/usb/uhcivar.h>
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#define PCI_INTERFACE(d) (((d)>>8)&0xff)
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#define PCI_SUBCLASS(d) ((d)&PCI_SUBCLASS_MASK)
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#define PCI_CLASS(d) ((d)&PCI_CLASS_MASK)
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#define PCI_VENDOR(d) ((d)&0xffff)
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#define PCI_DEVICE(d) (((d)>>8)&0xffff)
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#define PCI_UHCI_VENDORID_INTEL 0x8086
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#define PCI_UHCI_VENDORID_VIA 0x1106
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#define PCI_UHCI_DEVICEID_PIIX3 0x70208086ul
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static const char *uhci_device_piix3 = "Intel 82371SB (PIIX3) USB Host Controller";
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#define PCI_UHCI_DEVICEID_PIIX4 0x71128086ul
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#define PCI_UHCI_DEVICEID_PIIX4E 0x71128086ul /* no separate step */
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static const char *uhci_device_piix4 = "Intel 82371AB/EB (PIIX4) USB Host Controller";
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#define PCI_UHCI_DEVICEID_VT83C572 0x30381106ul
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static const char *uhci_device_vt83c572 = "VIA 83C572 USB Host Controller";
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static const char *uhci_device_generic = "UHCI (generic) USB Controller";
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#define PCI_UHCI_BASE_REG 0x20
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static const char *uhci_pci_probe __P((pcici_t, pcidi_t));
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static void uhci_pci_attach __P((pcici_t, int));
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u_long uhci_count = 0; /* global counter for nr. of devices found */
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static struct pci_device uhci_pci_device = {
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"uhci",
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uhci_pci_probe,
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uhci_pci_attach,
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&uhci_count,
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NULL
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};
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DATA_SET(pcidevice_set, uhci_pci_device);
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static const char *
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uhci_pci_probe(pcici_t config_id, pcidi_t device_id)
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{
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u_int32_t class;
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if (device_id == PCI_UHCI_DEVICEID_PIIX3) {
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return (uhci_device_piix3);
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} else if (device_id == PCI_UHCI_DEVICEID_PIIX4) {
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return (uhci_device_piix4);
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} else if (device_id == PCI_UHCI_DEVICEID_VT83C572) {
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return (uhci_device_vt83c572);
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} else {
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class = pci_conf_read(config_id, PCI_CLASS_REG);
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if ( PCI_CLASS(class) == PCI_CLASS_SERIALBUS
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&& PCI_SUBCLASS(class) == PCI_SUBCLASS_SERIALBUS_USB
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&& PCI_INTERFACE(class) == PCI_INTERFACE_UHCI) {
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return (uhci_device_generic);
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}
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}
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return NULL; /* dunno... */
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}
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static void
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uhci_pci_attach(pcici_t config_id, int unit)
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{
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int id, legsup;
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char *typestr;
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usbd_status r;
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uhci_softc_t *sc = NULL;
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sc = malloc(sizeof(uhci_softc_t), M_DEVBUF, M_NOWAIT);
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/* Do not free it below, intr might use the sc */
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if ( sc == NULL ) {
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printf("usb%d: could not allocate memory", unit);
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return;
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}
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memset(sc, 0, sizeof(uhci_softc_t));
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sc->sc_iobase = pci_conf_read(config_id,PCI_UHCI_BASE_REG) & 0xffe0;
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sc->unit = unit;
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if ( !pci_map_int(config_id, (pci_inthand_t *)uhci_intr,
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(void *) sc, &bio_imask)) {
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printf("usb%d: could not map irq\n", unit);
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return;
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}
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#ifndef USBVERBOSE
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if (bootverbose)
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#endif
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{
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switch(pci_conf_read(config_id, PCI_USBREV) & PCI_USBREV_MASK) {
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case PCI_USBREV_PRE_1_0:
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typestr = "pre 1.0";
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break;
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case PCI_USBREV_1_0:
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typestr = "1.0";
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break;
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default:
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typestr = "unknown";
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break;
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}
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printf("usb%d: USB version %s, chip rev. %d\n", unit, typestr,
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(int) pci_conf_read(config_id, PCIR_REVID) & 0xff);
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}
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/* Figure out vendor for root hub descriptor. */
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id = pci_conf_read(config_id, PCI_ID_REG);
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if (PCI_VENDOR(id) == PCI_UHCI_VENDORID_INTEL)
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sprintf(sc->sc_vendor, "Intel");
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else if (PCI_VENDOR(id) == PCI_UHCI_VENDORID_VIA)
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sprintf(sc->sc_vendor, "VIA");
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else
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sprintf(sc->sc_vendor, "(0x%04x)", PCI_VENDOR(id));
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/* We add a child to the root bus. After PCI configuration
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* has completed the root bus will start to probe and
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* attach all the devices attached to it, including our new
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* kid.
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*
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* FIXME Sometime in the future the UHCI controller itself will
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* become a kid of PCI device and this device add will no longer
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* be necessary.
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*
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* See README for an elaborate description of the bus
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* structure in spe.
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*/
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sc->sc_bus.bdev = device_add_child(root_bus, "usb", unit, sc);
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if (!sc->sc_bus.bdev) {
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printf("usb%d: could not add USB device to root bus\n", unit);
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return;
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}
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switch (id) {
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case PCI_UHCI_DEVICEID_PIIX3:
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device_set_desc(sc->sc_bus.bdev, uhci_device_piix3);
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break;
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case PCI_UHCI_DEVICEID_PIIX4:
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device_set_desc(sc->sc_bus.bdev, uhci_device_piix4);
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break;
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case PCI_UHCI_DEVICEID_VT83C572:
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device_set_desc(sc->sc_bus.bdev, uhci_device_vt83c572);
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break;
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default:
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printf("(New UHCI DeviceId=0x%08x)\n", id);
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device_set_desc(sc->sc_bus.bdev, uhci_device_generic);
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}
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legsup = pci_conf_read(config_id, PCI_LEGSUP);
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if ( ! (legsup & PCI_LEGSUP_USBPIRQDEN) ) {
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#if ! (defined(USBVERBOSE) || defined(USB_DEBUG))
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if (bootverbose)
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#endif
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printf("%s%d: PIRQD enable not set\n",
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device_get_name(sc->sc_bus.bdev),
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device_get_unit(sc->sc_bus.bdev));
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legsup |= PCI_LEGSUP_USBPIRQDEN;
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pci_conf_write(config_id, PCI_LEGSUP, legsup);
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}
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r = uhci_init(sc);
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if (r != USBD_NORMAL_COMPLETION) {
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printf("%s%d: init failed, error=%d\n",
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device_get_name(sc->sc_bus.bdev),
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device_get_unit(sc->sc_bus.bdev),
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r);
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device_delete_child(root_bus, sc->sc_bus.bdev);
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}
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return;
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}
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