6f8905baf6
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
386 lines
9.3 KiB
C
386 lines
9.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2008 Nathan Whitehorn
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* All rights reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/endian.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/dbdma.h>
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#include <sys/rman.h>
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#include "dbdmavar.h"
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static MALLOC_DEFINE(M_DBDMA, "dbdma", "DBDMA Command List");
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static uint32_t dbdma_read_reg(dbdma_channel_t *, u_int);
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static void dbdma_write_reg(dbdma_channel_t *, u_int, uint32_t);
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static void dbdma_phys_callback(void *, bus_dma_segment_t *, int, int);
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static void
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dbdma_phys_callback(void *chan, bus_dma_segment_t *segs, int nsegs, int error)
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{
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dbdma_channel_t *channel = (dbdma_channel_t *)(chan);
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channel->sc_slots_pa = segs[0].ds_addr;
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dbdma_write_reg(channel, CHAN_CMDPTR, channel->sc_slots_pa);
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}
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int
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dbdma_allocate_channel(struct resource *dbdma_regs, u_int offset,
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bus_dma_tag_t parent_dma, int slots, dbdma_channel_t **chan)
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{
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int error = 0;
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dbdma_channel_t *channel;
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channel = *chan = malloc(sizeof(struct dbdma_channel), M_DBDMA,
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M_WAITOK | M_ZERO);
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channel->sc_regs = dbdma_regs;
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channel->sc_off = offset;
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dbdma_stop(channel);
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channel->sc_slots_pa = 0;
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error = bus_dma_tag_create(parent_dma, 16, 0, BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, PAGE_SIZE, 0, NULL,
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NULL, &(channel->sc_dmatag));
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error = bus_dmamem_alloc(channel->sc_dmatag,
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(void **)&channel->sc_slots, BUS_DMA_WAITOK | BUS_DMA_ZERO,
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&channel->sc_dmamap);
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error = bus_dmamap_load(channel->sc_dmatag, channel->sc_dmamap,
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channel->sc_slots, PAGE_SIZE, dbdma_phys_callback, channel, 0);
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dbdma_write_reg(channel, CHAN_CMDPTR_HI, 0);
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channel->sc_nslots = slots;
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return (error);
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}
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int
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dbdma_resize_channel(dbdma_channel_t *chan, int newslots)
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{
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if (newslots > (PAGE_SIZE / sizeof(struct dbdma_command)))
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return (-1);
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chan->sc_nslots = newslots;
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return (0);
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}
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int
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dbdma_free_channel(dbdma_channel_t *chan)
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{
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dbdma_stop(chan);
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bus_dmamem_free(chan->sc_dmatag, chan->sc_slots, chan->sc_dmamap);
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bus_dma_tag_destroy(chan->sc_dmatag);
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free(chan, M_DBDMA);
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return (0);
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}
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uint16_t
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dbdma_get_cmd_status(dbdma_channel_t *chan, int slot)
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{
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bus_dmamap_sync(chan->sc_dmatag, chan->sc_dmamap, BUS_DMASYNC_POSTREAD);
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/*
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* I really did mean to swap resCount and xferStatus here, to
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* account for the quad-word little endian fields.
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*/
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return (le16toh(chan->sc_slots[slot].resCount));
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}
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void
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dbdma_clear_cmd_status(dbdma_channel_t *chan, int slot)
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{
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/* See endian note above */
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chan->sc_slots[slot].resCount = 0;
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}
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uint16_t
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dbdma_get_residuals(dbdma_channel_t *chan, int slot)
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{
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bus_dmamap_sync(chan->sc_dmatag, chan->sc_dmamap, BUS_DMASYNC_POSTREAD);
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return (le16toh(chan->sc_slots[slot].xferStatus));
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}
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void
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dbdma_reset(dbdma_channel_t *chan)
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{
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dbdma_stop(chan);
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dbdma_set_current_cmd(chan, 0);
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dbdma_run(chan);
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}
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void
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dbdma_run(dbdma_channel_t *chan)
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{
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uint32_t control_reg;
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control_reg = DBDMA_STATUS_RUN | DBDMA_STATUS_PAUSE |
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DBDMA_STATUS_WAKE | DBDMA_STATUS_DEAD;
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control_reg <<= DBDMA_REG_MASK_SHIFT;
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control_reg |= DBDMA_STATUS_RUN;
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dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
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}
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void
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dbdma_pause(dbdma_channel_t *chan)
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{
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uint32_t control_reg;
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control_reg = DBDMA_STATUS_PAUSE;
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control_reg <<= DBDMA_REG_MASK_SHIFT;
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control_reg |= DBDMA_STATUS_PAUSE;
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dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
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}
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void
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dbdma_wake(dbdma_channel_t *chan)
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{
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uint32_t control_reg;
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control_reg = DBDMA_STATUS_WAKE | DBDMA_STATUS_PAUSE |
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DBDMA_STATUS_RUN | DBDMA_STATUS_DEAD;
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control_reg <<= DBDMA_REG_MASK_SHIFT;
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control_reg |= DBDMA_STATUS_WAKE | DBDMA_STATUS_RUN;
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dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
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}
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void
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dbdma_stop(dbdma_channel_t *chan)
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{
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uint32_t control_reg;
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control_reg = DBDMA_STATUS_RUN;
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control_reg <<= DBDMA_REG_MASK_SHIFT;
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dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
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while (dbdma_read_reg(chan, CHAN_STATUS_REG) & DBDMA_STATUS_ACTIVE)
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DELAY(5);
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}
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void
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dbdma_set_current_cmd(dbdma_channel_t *chan, int slot)
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{
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uint32_t cmd;
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cmd = chan->sc_slots_pa + slot * sizeof(struct dbdma_command);
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dbdma_write_reg(chan, CHAN_CMDPTR, cmd);
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}
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uint16_t
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dbdma_get_chan_status(dbdma_channel_t *chan)
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{
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uint32_t status_reg;
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status_reg = dbdma_read_reg(chan, CHAN_STATUS_REG);
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return (status_reg & 0x0000ffff);
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}
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uint8_t
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dbdma_get_device_status(dbdma_channel_t *chan)
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{
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return (dbdma_get_chan_status(chan) & 0x00ff);
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}
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void
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dbdma_set_device_status(dbdma_channel_t *chan, uint8_t mask, uint8_t value)
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{
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uint32_t control_reg;
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control_reg = mask;
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control_reg <<= DBDMA_REG_MASK_SHIFT;
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control_reg |= value;
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dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
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}
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void
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dbdma_set_interrupt_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
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{
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uint32_t intr_select;
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intr_select = mask;
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intr_select <<= DBDMA_REG_MASK_SHIFT;
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intr_select |= val;
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dbdma_write_reg(chan, CHAN_INTR_SELECT, intr_select);
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}
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void
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dbdma_set_branch_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
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{
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uint32_t br_select;
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br_select = mask;
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br_select <<= DBDMA_REG_MASK_SHIFT;
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br_select |= val;
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dbdma_write_reg(chan, CHAN_BRANCH_SELECT, br_select);
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}
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void
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dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
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{
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uint32_t wait_select;
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wait_select = mask;
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wait_select <<= DBDMA_REG_MASK_SHIFT;
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wait_select |= val;
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dbdma_write_reg(chan, CHAN_WAIT_SELECT, wait_select);
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}
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void
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dbdma_insert_command(dbdma_channel_t *chan, int slot, int command, int stream,
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bus_addr_t data, size_t count, uint8_t interrupt, uint8_t branch,
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uint8_t wait, uint32_t branch_slot)
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{
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struct dbdma_command cmd;
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uint32_t *flip;
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cmd.cmd = command;
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cmd.key = stream;
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cmd.intr = interrupt;
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cmd.branch = branch;
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cmd.wait = wait;
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cmd.reqCount = count;
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cmd.address = (uint32_t)(data);
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if (command != DBDMA_STORE_QUAD && command != DBDMA_LOAD_QUAD)
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cmd.cmdDep = chan->sc_slots_pa +
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branch_slot * sizeof(struct dbdma_command);
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else
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cmd.cmdDep = branch_slot;
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cmd.resCount = 0;
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cmd.xferStatus = 0;
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/*
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* Move quadwords to little-endian. God only knows why
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* Apple thought this was a good idea.
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*/
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flip = (uint32_t *)(&cmd);
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flip[0] = htole32(flip[0]);
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flip[1] = htole32(flip[1]);
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flip[2] = htole32(flip[2]);
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chan->sc_slots[slot] = cmd;
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}
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void
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dbdma_insert_stop(dbdma_channel_t *chan, int slot)
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{
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dbdma_insert_command(chan, slot, DBDMA_STOP, 0, 0, 0, DBDMA_NEVER,
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DBDMA_NEVER, DBDMA_NEVER, 0);
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}
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void
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dbdma_insert_nop(dbdma_channel_t *chan, int slot)
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{
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dbdma_insert_command(chan, slot, DBDMA_NOP, 0, 0, 0, DBDMA_NEVER,
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DBDMA_NEVER, DBDMA_NEVER, 0);
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}
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void
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dbdma_insert_branch(dbdma_channel_t *chan, int slot, int to_slot)
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{
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dbdma_insert_command(chan, slot, DBDMA_NOP, 0, 0, 0, DBDMA_NEVER,
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DBDMA_ALWAYS, DBDMA_NEVER, to_slot);
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}
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void
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dbdma_sync_commands(dbdma_channel_t *chan, bus_dmasync_op_t op)
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{
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bus_dmamap_sync(chan->sc_dmatag, chan->sc_dmamap, op);
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}
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void
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dbdma_save_state(dbdma_channel_t *chan)
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{
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chan->sc_saved_regs[0] = dbdma_read_reg(chan, CHAN_CMDPTR);
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chan->sc_saved_regs[1] = dbdma_read_reg(chan, CHAN_CMDPTR_HI);
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chan->sc_saved_regs[2] = dbdma_read_reg(chan, CHAN_INTR_SELECT);
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chan->sc_saved_regs[3] = dbdma_read_reg(chan, CHAN_BRANCH_SELECT);
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chan->sc_saved_regs[4] = dbdma_read_reg(chan, CHAN_WAIT_SELECT);
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dbdma_stop(chan);
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}
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void
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dbdma_restore_state(dbdma_channel_t *chan)
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{
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dbdma_wake(chan);
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dbdma_write_reg(chan, CHAN_CMDPTR, chan->sc_saved_regs[0]);
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dbdma_write_reg(chan, CHAN_CMDPTR_HI, chan->sc_saved_regs[1]);
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dbdma_write_reg(chan, CHAN_INTR_SELECT, chan->sc_saved_regs[2]);
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dbdma_write_reg(chan, CHAN_BRANCH_SELECT, chan->sc_saved_regs[3]);
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dbdma_write_reg(chan, CHAN_WAIT_SELECT, chan->sc_saved_regs[4]);
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}
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static uint32_t
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dbdma_read_reg(dbdma_channel_t *chan, u_int offset)
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{
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return (bus_read_4(chan->sc_regs, chan->sc_off + offset));
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}
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static void
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dbdma_write_reg(dbdma_channel_t *chan, u_int offset, uint32_t val)
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{
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bus_write_4(chan->sc_regs, chan->sc_off + offset, val);
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}
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