8ebfdfe248
This is a sync to mesa/drm pre-gem, with a few fixes on top of that. It also contains one local patch supplied by kib@ that I can't apply to git.master shared code. Approved by: flz Obtained from: mesa/drm git.master MFC after: 2 weeks
163 lines
4.7 KiB
C
163 lines
4.7 KiB
C
/* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*-
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* Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c
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*/
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/*-
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* Copyright (C) The Weather Channel, Inc. 2002.
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* Copyright 2003 Leif Delgass
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* All Rights Reserved.
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*
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* The Weather Channel (TM) funded Tungsten Graphics to develop the
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* initial release of the Radeon 8500 driver under the XFree86 license.
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* This notice must be preserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Keith Whitwell <keith@tungstengraphics.com>
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* Eric Anholt <anholt@FreeBSD.org>
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* Leif Delgass <ldelgass@retinalburn.net>
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "dev/drm/drmP.h"
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#include "dev/drm/drm.h"
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#include "dev/drm/mach64_drm.h"
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#include "dev/drm/mach64_drv.h"
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irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS)
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{
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struct drm_device *dev = arg;
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drm_mach64_private_t *dev_priv = dev->dev_private;
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int status;
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status = MACH64_READ(MACH64_CRTC_INT_CNTL);
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/* VBLANK interrupt */
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if (status & MACH64_CRTC_VBLANK_INT) {
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/* Mask off all interrupt ack bits before setting the ack bit, since
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* there may be other handlers outside the DRM.
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*
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* NOTE: On mach64, you need to keep the enable bits set when doing
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* the ack, despite what the docs say about not acking and enabling
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* in a single write.
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*/
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MACH64_WRITE(MACH64_CRTC_INT_CNTL,
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(status & ~MACH64_CRTC_INT_ACKS)
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| MACH64_CRTC_VBLANK_INT);
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atomic_inc(&dev_priv->vbl_received);
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drm_handle_vblank(dev, 0);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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u32 mach64_get_vblank_counter(struct drm_device * dev, int crtc)
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{
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const drm_mach64_private_t *const dev_priv = dev->dev_private;
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if (crtc != 0)
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return 0;
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return atomic_read(&dev_priv->vbl_received);
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}
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int mach64_enable_vblank(struct drm_device * dev, int crtc)
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{
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drm_mach64_private_t *dev_priv = dev->dev_private;
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u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
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if (crtc != 0) {
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DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
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crtc);
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return -EINVAL;
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}
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DRM_DEBUG("before enable vblank CRTC_INT_CTNL: 0x%08x\n", status);
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/* Turn on VBLANK interrupt */
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MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL)
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| MACH64_CRTC_VBLANK_INT_EN);
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return 0;
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}
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void mach64_disable_vblank(struct drm_device * dev, int crtc)
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{
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if (crtc != 0) {
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DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
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crtc);
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return;
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}
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/*
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* FIXME: implement proper interrupt disable by using the vblank
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* counter register (if available).
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*/
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}
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static void mach64_disable_vblank_local(struct drm_device * dev, int crtc)
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{
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drm_mach64_private_t *dev_priv = dev->dev_private;
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u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
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if (crtc != 0) {
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DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
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crtc);
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return;
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}
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DRM_DEBUG("before disable vblank CRTC_INT_CTNL: 0x%08x\n", status);
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/* Disable and clear VBLANK interrupt */
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MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN)
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| MACH64_CRTC_VBLANK_INT);
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}
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void mach64_driver_irq_preinstall(struct drm_device * dev)
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{
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drm_mach64_private_t *dev_priv = dev->dev_private;
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u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
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DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status);
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mach64_disable_vblank_local(dev, 0);
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}
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int mach64_driver_irq_postinstall(struct drm_device * dev)
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{
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return drm_vblank_init(dev, 1);
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}
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void mach64_driver_irq_uninstall(struct drm_device * dev)
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{
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drm_mach64_private_t *dev_priv = dev->dev_private;
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if (!dev_priv)
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return;
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mach64_disable_vblank_local(dev, 0);
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DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n",
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MACH64_READ(MACH64_CRTC_INT_CNTL));
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}
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