80568041a3
static device mappings. This SoC relied heavily on the fact that all devices were static-mapped at a fixed address, and it (rather bogusly) used bus_space read and write calls passing hard-coded virtual addresses instead of proper bus handles, relying on the fact that the virtual addresses of the mappings were known at compile time, and relying on the implementation details of arm bus_space never changing. All such usage was replaced with calls to bus_space_map() to obtain a proper bus handle for the read/write calls. This required adjusting some of the #define values that map out hardware registers, and some of them were renamed in the process to make it clear which were defining absolute physical addresses and which were defining offsets. (The ones that just define offsets don't appear to be referenced and probably serve no value other than perhaps documentation.)
553 lines
14 KiB
C
553 lines
14 KiB
C
/*-
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* Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* GPIO on LPC32x0 consist of 4 ports:
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* - Port0 with 8 input/output pins
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* - Port1 with 24 input/output pins
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* - Port2 with 13 input/output pins
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* - Port3 with:
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* - 26 input pins (GPI_00..GPI_09 + GPI_15..GPI_23 + GPI_25 + GPI_27..GPI_28)
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* - 24 output pins (GPO_00..GPO_23)
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* - 6 input/output pins (GPIO_00..GPIO_05)
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*
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* Pins are mapped to logical pin number as follows:
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* [0..9] -> GPI_00..GPI_09 (port 3)
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* [10..18] -> GPI_15..GPI_23 (port 3)
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* [19] -> GPI_25 (port 3)
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* [20..21] -> GPI_27..GPI_28 (port 3)
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* [22..45] -> GPO_00..GPO_23 (port 3)
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* [46..51] -> GPIO_00..GPIO_05 (port 3)
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* [52..64] -> P2.0..P2.12 (port 2)
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* [65..88] -> P1.0..P1.23 (port 1)
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* [89..96] -> P0.0..P0.7 (port 0)
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/queue.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <machine/fdt.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/lpc/lpcreg.h>
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#include <arm/lpc/lpcvar.h>
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#include "gpio_if.h"
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struct lpc_gpio_softc
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{
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device_t lg_dev;
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struct resource * lg_res;
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bus_space_tag_t lg_bst;
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bus_space_handle_t lg_bsh;
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};
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struct lpc_gpio_pinmap
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{
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int lp_start_idx;
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int lp_pin_count;
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int lp_port;
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int lp_start_bit;
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int lp_flags;
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};
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static const struct lpc_gpio_pinmap lpc_gpio_pins[] = {
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{ 0, 10, 3, 0, GPIO_PIN_INPUT },
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{ 10, 9, 3, 15, GPIO_PIN_INPUT },
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{ 19, 1, 3, 25, GPIO_PIN_INPUT },
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{ 20, 2, 3, 27, GPIO_PIN_INPUT },
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{ 22, 24, 3, 0, GPIO_PIN_OUTPUT },
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/*
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* -1 below is to mark special case for Port3 GPIO pins, as they
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* have other bits in Port 3 registers as inputs and as outputs
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*/
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{ 46, 6, 3, -1, GPIO_PIN_INPUT | GPIO_PIN_OUTPUT },
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{ 52, 13, 2, 0, GPIO_PIN_INPUT | GPIO_PIN_OUTPUT },
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{ 65, 24, 1, 0, GPIO_PIN_INPUT | GPIO_PIN_OUTPUT },
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{ 89, 8, 0, 0, GPIO_PIN_INPUT | GPIO_PIN_OUTPUT },
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{ -1, -1, -1, -1, -1 },
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};
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#define LPC_GPIO_NPINS \
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(LPC_GPIO_P0_COUNT + LPC_GPIO_P1_COUNT + \
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LPC_GPIO_P2_COUNT + LPC_GPIO_P3_COUNT)
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#define LPC_GPIO_PIN_IDX(_map, _idx) \
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(_idx - _map->lp_start_idx)
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#define LPC_GPIO_PIN_BIT(_map, _idx) \
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(_map->lp_start_bit + LPC_GPIO_PIN_IDX(_map, _idx))
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static int lpc_gpio_probe(device_t);
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static int lpc_gpio_attach(device_t);
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static int lpc_gpio_detach(device_t);
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static int lpc_gpio_pin_max(device_t, int *);
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static int lpc_gpio_pin_getcaps(device_t, uint32_t, uint32_t *);
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static int lpc_gpio_pin_getflags(device_t, uint32_t, uint32_t *);
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static int lpc_gpio_pin_setflags(device_t, uint32_t, uint32_t);
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static int lpc_gpio_pin_getname(device_t, uint32_t, char *);
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static int lpc_gpio_pin_get(device_t, uint32_t, uint32_t *);
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static int lpc_gpio_pin_set(device_t, uint32_t, uint32_t);
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static int lpc_gpio_pin_toggle(device_t, uint32_t);
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static const struct lpc_gpio_pinmap *lpc_gpio_get_pinmap(int);
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static struct lpc_gpio_softc *lpc_gpio_sc = NULL;
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#define lpc_gpio_read_4(_sc, _reg) \
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bus_space_read_4(_sc->lg_bst, _sc->lg_bsh, _reg)
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#define lpc_gpio_write_4(_sc, _reg, _val) \
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bus_space_write_4(_sc->lg_bst, _sc->lg_bsh, _reg, _val)
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#define lpc_gpio_get_4(_sc, _test, _reg1, _reg2) \
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lpc_gpio_read_4(_sc, ((_test) ? _reg1 : _reg2))
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#define lpc_gpio_set_4(_sc, _test, _reg1, _reg2, _val) \
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lpc_gpio_write_4(_sc, ((_test) ? _reg1 : _reg2), _val)
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static int
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lpc_gpio_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "lpc,gpio"))
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return (ENXIO);
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device_set_desc(dev, "LPC32x0 GPIO");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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lpc_gpio_attach(device_t dev)
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{
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struct lpc_gpio_softc *sc = device_get_softc(dev);
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int rid;
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sc->lg_dev = dev;
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rid = 0;
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sc->lg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->lg_res) {
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device_printf(dev, "cannot allocate memory window\n");
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return (ENXIO);
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}
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sc->lg_bst = rman_get_bustag(sc->lg_res);
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sc->lg_bsh = rman_get_bushandle(sc->lg_res);
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lpc_gpio_sc = sc;
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device_add_child(dev, "gpioc", device_get_unit(dev));
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device_add_child(dev, "gpiobus", device_get_unit(dev));
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return (bus_generic_attach(dev));
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}
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static int
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lpc_gpio_detach(device_t dev)
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{
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return (EBUSY);
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}
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static int
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lpc_gpio_pin_max(device_t dev, int *npins)
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{
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*npins = LPC_GPIO_NPINS - 1;
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return (0);
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}
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static int
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lpc_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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const struct lpc_gpio_pinmap *map;
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if (pin > LPC_GPIO_NPINS)
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return (ENODEV);
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map = lpc_gpio_get_pinmap(pin);
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*caps = map->lp_flags;
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return (0);
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}
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static int
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lpc_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct lpc_gpio_softc *sc = device_get_softc(dev);
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const struct lpc_gpio_pinmap *map;
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uint32_t state;
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int dir;
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if (pin > LPC_GPIO_NPINS)
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return (ENODEV);
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map = lpc_gpio_get_pinmap(pin);
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/* Check whether it's bidirectional pin */
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if ((map->lp_flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) !=
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(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) {
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*flags = map->lp_flags;
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return (0);
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}
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switch (map->lp_port) {
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case 0:
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state = lpc_gpio_read_4(sc, LPC_GPIO_P0_DIR_STATE);
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dir = (state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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break;
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case 1:
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state = lpc_gpio_read_4(sc, LPC_GPIO_P1_DIR_STATE);
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dir = (state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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break;
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case 2:
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state = lpc_gpio_read_4(sc, LPC_GPIO_P2_DIR_STATE);
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dir = (state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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break;
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case 3:
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state = lpc_gpio_read_4(sc, LPC_GPIO_P2_DIR_STATE);
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dir = (state & (1 << (25 + LPC_GPIO_PIN_IDX(map, pin))));
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break;
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default:
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panic("unknown GPIO port");
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}
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*flags = dir ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT;
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return (0);
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}
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static int
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lpc_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct lpc_gpio_softc *sc = device_get_softc(dev);
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const struct lpc_gpio_pinmap *map;
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uint32_t dir, state;
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if (pin > LPC_GPIO_NPINS)
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return (ENODEV);
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map = lpc_gpio_get_pinmap(pin);
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/* Check whether it's bidirectional pin */
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if ((map->lp_flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) !=
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(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT))
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return (ENOTSUP);
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if (flags & GPIO_PIN_INPUT)
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dir = 0;
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if (flags & GPIO_PIN_OUTPUT)
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dir = 1;
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switch (map->lp_port) {
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case 0:
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state = (1 << LPC_GPIO_PIN_IDX(map, pin));
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lpc_gpio_set_4(sc, dir, LPC_GPIO_P0_DIR_SET,
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LPC_GPIO_P0_DIR_CLR, state);
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break;
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case 1:
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state = (1 << LPC_GPIO_PIN_IDX(map, pin));
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lpc_gpio_set_4(sc, dir, LPC_GPIO_P1_DIR_SET,
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LPC_GPIO_P0_DIR_CLR, state);
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break;
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case 2:
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state = (1 << LPC_GPIO_PIN_IDX(map, pin));
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lpc_gpio_set_4(sc, dir, LPC_GPIO_P2_DIR_SET,
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LPC_GPIO_P0_DIR_CLR, state);
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break;
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case 3:
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state = (1 << (25 + (pin - map->lp_start_idx)));
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lpc_gpio_set_4(sc, dir, LPC_GPIO_P2_DIR_SET,
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LPC_GPIO_P0_DIR_CLR, state);
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break;
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}
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return (0);
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}
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static int
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lpc_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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const struct lpc_gpio_pinmap *map;
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int idx;
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map = lpc_gpio_get_pinmap(pin);
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idx = LPC_GPIO_PIN_IDX(map, pin);
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switch (map->lp_port) {
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case 0:
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case 1:
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case 2:
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snprintf(name, GPIOMAXNAME - 1, "P%d.%d", map->lp_port,
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map->lp_start_bit + LPC_GPIO_PIN_IDX(map, pin));
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break;
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case 3:
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if (map->lp_start_bit == -1) {
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snprintf(name, GPIOMAXNAME - 1, "GPIO_%02d", idx);
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break;
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}
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snprintf(name, GPIOMAXNAME - 1, "GP%c_%02d",
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(map->lp_flags & GPIO_PIN_INPUT) ? 'I' : 'O',
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map->lp_start_bit + idx);
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break;
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}
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return (0);
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}
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static int
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lpc_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *value)
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{
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struct lpc_gpio_softc *sc = device_get_softc(dev);
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const struct lpc_gpio_pinmap *map;
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uint32_t state, flags;
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int dir;
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map = lpc_gpio_get_pinmap(pin);
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if (lpc_gpio_pin_getflags(dev, pin, &flags))
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return (ENXIO);
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if (flags & GPIO_PIN_OUTPUT)
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dir = 1;
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if (flags & GPIO_PIN_INPUT)
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dir = 0;
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switch (map->lp_port) {
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case 0:
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state = lpc_gpio_get_4(sc, dir, LPC_GPIO_P0_OUTP_STATE,
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LPC_GPIO_P0_INP_STATE);
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*value = !!(state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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case 1:
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state = lpc_gpio_get_4(sc, dir, LPC_GPIO_P1_OUTP_STATE,
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LPC_GPIO_P1_INP_STATE);
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*value = !!(state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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case 2:
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state = lpc_gpio_read_4(sc, LPC_GPIO_P2_INP_STATE);
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*value = !!(state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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case 3:
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state = lpc_gpio_get_4(sc, dir, LPC_GPIO_P3_OUTP_STATE,
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LPC_GPIO_P3_INP_STATE);
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if (map->lp_start_bit == -1) {
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if (dir)
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*value = !!(state & (1 << (25 +
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LPC_GPIO_PIN_IDX(map, pin))));
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else
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*value = !!(state & (1 << (10 +
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LPC_GPIO_PIN_IDX(map, pin))));
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}
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*value = !!(state & (1 << LPC_GPIO_PIN_BIT(map, pin)));
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}
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return (0);
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}
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static int
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lpc_gpio_pin_set(device_t dev, uint32_t pin, uint32_t value)
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{
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struct lpc_gpio_softc *sc = device_get_softc(dev);
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const struct lpc_gpio_pinmap *map;
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uint32_t state, flags;
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map = lpc_gpio_get_pinmap(pin);
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if (lpc_gpio_pin_getflags(dev, pin, &flags))
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return (ENXIO);
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if ((flags & GPIO_PIN_OUTPUT) == 0)
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return (EINVAL);
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state = (1 << LPC_GPIO_PIN_BIT(map, pin));
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switch (map->lp_port) {
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case 0:
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lpc_gpio_set_4(sc, value, LPC_GPIO_P0_OUTP_SET,
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LPC_GPIO_P0_OUTP_CLR, state);
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break;
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case 1:
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lpc_gpio_set_4(sc, value, LPC_GPIO_P1_OUTP_SET,
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LPC_GPIO_P1_OUTP_CLR, state);
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break;
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case 2:
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lpc_gpio_set_4(sc, value, LPC_GPIO_P2_OUTP_SET,
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LPC_GPIO_P2_OUTP_CLR, state);
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break;
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case 3:
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if (map->lp_start_bit == -1)
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state = (1 << (25 + LPC_GPIO_PIN_IDX(map, pin)));
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lpc_gpio_set_4(sc, value, LPC_GPIO_P3_OUTP_SET,
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LPC_GPIO_P3_OUTP_CLR, state);
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break;
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}
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return (0);
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}
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static int
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lpc_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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const struct lpc_gpio_pinmap *map;
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uint32_t flags;
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map = lpc_gpio_get_pinmap(pin);
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if (lpc_gpio_pin_getflags(dev, pin, &flags))
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return (ENXIO);
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if ((flags & GPIO_PIN_OUTPUT) == 0)
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return (EINVAL);
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panic("not implemented yet");
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return (0);
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}
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static const struct lpc_gpio_pinmap *
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lpc_gpio_get_pinmap(int pin)
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{
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const struct lpc_gpio_pinmap *map;
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for (map = &lpc_gpio_pins[0]; map->lp_start_idx != -1; map++) {
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if (pin >= map->lp_start_idx &&
|
|
pin < map->lp_start_idx + map->lp_pin_count)
|
|
return map;
|
|
}
|
|
|
|
panic("pin number %d out of range", pin);
|
|
}
|
|
|
|
int
|
|
lpc_gpio_set_flags(device_t dev, int pin, int flags)
|
|
{
|
|
if (lpc_gpio_sc == NULL)
|
|
return (ENXIO);
|
|
|
|
return lpc_gpio_pin_setflags(lpc_gpio_sc->lg_dev, pin, flags);
|
|
}
|
|
|
|
int
|
|
lpc_gpio_set_state(device_t dev, int pin, int state)
|
|
{
|
|
if (lpc_gpio_sc == NULL)
|
|
return (ENXIO);
|
|
|
|
return lpc_gpio_pin_set(lpc_gpio_sc->lg_dev, pin, state);
|
|
}
|
|
|
|
int
|
|
lpc_gpio_get_state(device_t dev, int pin, int *state)
|
|
{
|
|
if (lpc_gpio_sc == NULL)
|
|
return (ENXIO);
|
|
|
|
return lpc_gpio_pin_get(lpc_gpio_sc->lg_dev, pin, state);
|
|
}
|
|
|
|
void
|
|
platform_gpio_init()
|
|
{
|
|
bus_space_tag_t bst;
|
|
bus_space_handle_t bsh;
|
|
|
|
bst = fdtbus_bs_tag;
|
|
|
|
/* Preset SPI devices CS pins to one */
|
|
bus_space_map(bst, LPC_GPIO_PHYS_BASE, LPC_GPIO_SIZE, 0, &bsh);
|
|
bus_space_write_4(bst, bsh, LPC_GPIO_P3_OUTP_SET,
|
|
1 << (SSD1289_CS_PIN - LPC_GPIO_GPO_00(0)) |
|
|
1 << (SSD1289_DC_PIN - LPC_GPIO_GPO_00(0)) |
|
|
1 << (ADS7846_CS_PIN - LPC_GPIO_GPO_00(0)));
|
|
bus_space_unmap(bst, bsh, LPC_GPIO_SIZE);
|
|
}
|
|
|
|
static device_method_t lpc_gpio_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, lpc_gpio_probe),
|
|
DEVMETHOD(device_attach, lpc_gpio_attach),
|
|
DEVMETHOD(device_detach, lpc_gpio_detach),
|
|
|
|
/* GPIO interface */
|
|
DEVMETHOD(gpio_pin_max, lpc_gpio_pin_max),
|
|
DEVMETHOD(gpio_pin_getcaps, lpc_gpio_pin_getcaps),
|
|
DEVMETHOD(gpio_pin_getflags, lpc_gpio_pin_getflags),
|
|
DEVMETHOD(gpio_pin_setflags, lpc_gpio_pin_setflags),
|
|
DEVMETHOD(gpio_pin_getname, lpc_gpio_pin_getname),
|
|
DEVMETHOD(gpio_pin_set, lpc_gpio_pin_set),
|
|
DEVMETHOD(gpio_pin_get, lpc_gpio_pin_get),
|
|
DEVMETHOD(gpio_pin_toggle, lpc_gpio_pin_toggle),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static devclass_t lpc_gpio_devclass;
|
|
|
|
static driver_t lpc_gpio_driver = {
|
|
"lpcgpio",
|
|
lpc_gpio_methods,
|
|
sizeof(struct lpc_gpio_softc),
|
|
};
|
|
|
|
extern devclass_t gpiobus_devclass, gpioc_devclass;
|
|
extern driver_t gpiobus_driver, gpioc_driver;
|
|
|
|
DRIVER_MODULE(lpcgpio, simplebus, lpc_gpio_driver, lpc_gpio_devclass, 0, 0);
|
|
DRIVER_MODULE(gpiobus, lpcgpio, gpiobus_driver, gpiobus_devclass, 0, 0);
|
|
DRIVER_MODULE(gpioc, lpcgpio, gpioc_driver, gpioc_devclass, 0, 0);
|
|
MODULE_VERSION(lpcgpio, 1);
|