adrian 811bc0ce53 Do a read-after-write to ensure the interrupt register update is flushed
to the hardware.

The QCA HAL has a comment noting that if this isn't done, modifications
to AR_IMR_S2 before AR_IMR is flushed may produce spurious interrupts.

Obtained from:	QCA
2014-04-27 23:31:42 +00:00
..
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