Marcin Wojtas 819760b35f mvebu_gpio: fix interrupt cause register configuration ... According to Armada 8k documentation, the interrupt cause register (at offset 0x14) is RW0C. Update the configuration in attach and the mvebu_gpio_isrc_eoi() to follow the description. Reviewed by: mmel Obtained from: Semihalf Sponsored by: Marvell Differential Revision: https://reviews.freebsd.org/D29013		2021-03-03 00:22:42 +01:00
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allwinner	arm: arm64: Directly use #include <dt-binding/...>	2021-01-15 14:17:03 +01:00
altera/socfpga	arm: clean up empty lines in .c and .h files	2020-09-01 21:17:24 +00:00
annapurna/alpine	Remove the pre-ARMv6 and pre-INTRNG code.	2020-11-29 08:40:12 +00:00
arm	Remove __XSCALE__ checks from the arm code	2021-02-19 15:31:26 +00:00
broadcom/bcm2835	arm64: rpi4: gpio: Add brcm,bcm2711-gpio compatible	2021-02-17 13:18:26 +01:00
cloudabi32	Get rid of sa->narg. It serves no purpose; use sa->callp->sy_narg instead.	2020-09-27 18:47:06 +00:00
conf	Split out the NODEBUG options to a common file	2021-01-14 16:57:53 +00:00
freescale	Add basic support for Freescale LX2160A SoC.	2020-12-05 12:08:37 +00:00
include	arm: revert MAXDSIZ change from 202aea9c82	2021-01-09 14:14:00 -06:00
linux	Regen after r366145.	2020-09-25 10:05:38 +00:00
mv	mvebu_gpio: fix interrupt cause register configuration	2021-03-03 00:22:42 +01:00
nvidia	arm: arm64: Directly use #include <dt-binding/...>	2021-01-15 14:17:03 +01:00
qemu	arm: Add kern_clocksource.c directly in files.arm	2019-04-16 20:04:22 +00:00
rockchip	Add support for RK3288 SoC.	2020-12-04 16:24:44 +00:00
ti	Revert "Define PNP info after defining driver modules"	2021-01-23 10:59:41 -05:00
versatile	Remove the pre-ARMv6 and pre-INTRNG code.	2020-11-29 08:40:12 +00:00
xilinx	arm: clean up empty lines in .c and .h files	2020-09-01 21:17:24 +00:00