5cbccc1ef6
MFC after: 2 weeks
256 lines
7.9 KiB
Groff
256 lines
7.9 KiB
Groff
.\"
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.\" Copyright (c) 2003 Marcel Moolenaar
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\"
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd April 26, 2017
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.Dt UART 4
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.Os
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.Sh NAME
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.Nm uart
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.Nd driver for Universal Asynchronous Receiver/Transmitter (UART) devices
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.Sh SYNOPSIS
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.Cd "device uart"
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.Pp
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.Cd "device puc"
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.Cd "device uart"
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.Pp
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.Cd "device scc"
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.Cd "device uart"
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.Pp
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In
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.Pa /boot/device.hints :
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.Cd hint.uart.0.disabled="1"
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.Cd hint.uart.0.baud="38400"
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.Cd hint.uart.0.port="0x3f8"
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.Cd hint.uart.0.flags="0x10"
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.Pp
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With
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.Ar flags
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encoded as:
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.Bl -tag -compact -width 0x000000
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.It 0x00010
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device is potential system console
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.It 0x00080
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use this port for remote kernel debugging
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.It 0x00100
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set RX FIFO trigger level to ``low'' (NS8250 only)
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.It 0x00200
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set RX FIFO trigger level to ``medium low'' (NS8250 only)
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.It 0x00400
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set RX FIFO trigger level to ``medium high'' (default, NS8250 only)
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.It 0x00800
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set RX FIFO trigger level to ``high'' (NS8250 only)
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.El
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.\"
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.Sh DESCRIPTION
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The
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.Nm
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device driver provides support for various classes of UARTs implementing the
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EIA RS-232C (CCITT V.24) serial communications interface.
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Each such interface is controlled by a separate and independent instance of
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the
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.Nm
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driver.
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The primary support for devices that contain multiple serial interfaces or
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that contain other functionality besides one or more serial interfaces is
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provided by the
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.Xr puc 4 ,
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or
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.Xr scc 4
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device drivers.
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However, the serial interfaces of those devices that are managed by the
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.Xr puc 4 ,
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or
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.Xr scc 4
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driver are each independently controlled by the
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.Nm
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driver.
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As such, the
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.Xr puc 4 ,
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or
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.Xr scc 4
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driver provides umbrella functionality for the
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.Nm
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driver and hides the complexities that are inherent when elementary components
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are packaged together.
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.Pp
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The
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.Nm
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driver has a modular design to allow it to be used on differing hardware and
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for various purposes.
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In the following sections the components are discussed in detail.
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Options are described in the section that covers the component to which each
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option applies.
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.\"
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.Ss CORE COMPONENT
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At the heart of the
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.Nm
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driver is the core component.
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It contains the bus attachments and the low-level interrupt handler.
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.\"
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.Ss HARDWARE DRIVERS
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The core component and the kernel interfaces talk to the hardware through the
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hardware interface.
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This interface serves as an abstraction of the hardware and allows varying
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UARTs to be used for serial communications.
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.\"
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.Ss SYSTEM DEVICES
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System devices are UARTs that have a special purpose by way of hardware
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design or software setup.
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For example, Sun UltraSparc machines use UARTs as their keyboard interface.
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Such an UART cannot be used for general purpose communications.
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Likewise, when the kernel is configured for a serial console, the
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corresponding UART will in turn be a system device so that the kernel can
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output boot messages early on in the boot process.
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.\"
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.Ss KERNEL INTERFACES
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The last but not least of the components is the kernel interface.
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This component ultimately determines how the UART is made visible to the
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kernel in particular and to users in general.
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The default kernel interface is the TTY interface.
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This allows the UART to be used for terminals, modems and serial line IP
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applications.
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System devices, with the notable exception of serial consoles, generally
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have specialized kernel interfaces.
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.\"
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.Sh HARDWARE
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The
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.Nm
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driver supports the following classes of UARTs:
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.Pp
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.Bl -bullet -compact
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.It
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NS8250: standard hardware based on the 8250, 16450, 16550, 16650, 16750 or
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the 16950 UARTs.
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.It
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SCC: serial communications controllers supported by the
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.Xr scc 4
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device driver.
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.El
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.\"
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.Sh Pulse Per Second (PPS) Timing Interface
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The
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.Nm
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driver can capture PPS timing information as defined in RFC 2783.
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The API, accessed via
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.Xr ioctl 2 ,
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is available on the tty device.
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To use the PPS capture feature with
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.Xr ntpd 8 ,
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symlink the tty callout device
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.Va /dev/cuau?
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to
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.Va /dev/pps0.
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.Pp
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The
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.Va hw.uart.pps_mode
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tunable configures the PPS capture mode for all uart devices;
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it can be set in
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.Xr loader.conf 5 .
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The
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.Va dev.uart.0.pps_mode
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sysctl configures the PPS capture mode for a specific uart device;
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it can be set in
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.Xr loader.conf 5
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or
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.Xr sysctl.conf 5 .
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.Pp
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The following capture modes are available:
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.Bl -tag -compact -offset "mmmm" -width "mmmm"
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.It 0x00
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Capture disabled.
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.It 0x01
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Capture pulses on the CTS line.
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.It 0x02
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Capture pulses on the DCD line.
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.El
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.Pp
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The following values may be ORed with the capture mode to configure
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capture processing options:
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.Bl -tag -compact -offset "mmmm" -width "mmmm"
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.It 0x10
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Invert the pulse (RS-232 logic low = ASSERT, high = CLEAR).
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.It 0x20
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Attempt to capture narrow pulses.
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.El
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.Pp
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Add the narrow pulse option when the incoming PPS pulse width is small
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enough to prevent reliable capture in normal mode.
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In narrow mode the driver uses the hardware's ability to latch a line
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state change; not all hardware has this capability.
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The hardware latch provides a reliable indication that a pulse occurred,
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but prevents distinguishing between the CLEAR and ASSERT edges of the pulse.
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For each detected pulse, the driver synthesizes both an ASSERT and a CLEAR
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event, using the same timestamp for each.
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To prevent spurious events when the hardware is intermittently able to
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see both edges of a pulse, the driver will not generate a new pair of
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events within a half second of the prior pair.
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Both normal and narrow pulse modes work with
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.Xr ntpd 8 .
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.Pp
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Add the invert option when the connection to the uart device uses TTL
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level signals, or when the PPS source emits inverted pulses.
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RFC 2783 defines an ASSERT event as a higher-voltage line level, and a CLEAR
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event as a lower-voltage line level, in the context of the RS-232 protocol.
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The modem control signals on a TTL-level connection are typically
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inverted from the RS-232 levels.
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For example, carrier presence is indicated by a high signal on an RS-232
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DCD line, and by a low signal on a TTL DCD line.
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This is due to the use of inverting line driver buffers to convert between
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TTL and RS-232 line levels in most hardware designs.
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Generally speaking, a connection to a DB-9 style connector is an RS-232
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level signal at up to 12 volts.
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A connection to header pins or an edge-connector on an embedded board
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is typically a TTL signal at 3.3 or 5 volts.
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.Sh FILES
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.Bl -tag -width "/dev/ttyu?.init" -compact
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.It Pa /dev/ttyu?
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for callin ports
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.It Pa /dev/ttyu?.init
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.It Pa /dev/ttyu?.lock
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corresponding callin initial-state and lock-state devices
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.Pp
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.It Pa /dev/cuau?
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for callout ports
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.It Pa /dev/cuau?.init
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.It Pa /dev/cuau?.lock
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corresponding callout initial-state and lock-state devices
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.El
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.Sh SEE ALSO
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.Xr puc 4 ,
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.Xr scc 4
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.\"
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.Sh HISTORY
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The
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.Nm
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device driver first appeared in
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.Fx 5.2 .
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.Sh AUTHORS
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The
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.Nm
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device driver and this manual page were written by
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.An Marcel Moolenaar Aq Mt marcel@xcllnt.net .
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