a53ce3fc49
This one goes to 14.
Approved by: re (implicit)
Sponsored by: Rubicon Communications, LLC ("Netgate")
114 lines
3.1 KiB
Makefile
114 lines
3.1 KiB
Makefile
# $FreeBSD$
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.include <src.opts.mk>
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.ifndef LLVM_BASE
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.error Please define LLVM_BASE before including this file
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.endif
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.ifndef LLVM_SRCS
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.error Please define LLVM_SRCS before including this file
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.endif
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.ifndef SRCDIR
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.error Please define SRCDIR before including this file
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.endif
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.PATH: ${LLVM_BASE}/${SRCDIR}
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CFLAGS+= -I${SRCTOP}/lib/clang/include
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CFLAGS+= -I${LLVM_SRCS}/include
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CFLAGS+= -D__STDC_CONSTANT_MACROS
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CFLAGS+= -D__STDC_FORMAT_MACROS
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CFLAGS+= -D__STDC_LIMIT_MACROS
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CFLAGS+= -DHAVE_VCS_VERSION_INC
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.if ${MK_LLVM_ASSERTIONS} == "no"
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CFLAGS+= -DNDEBUG
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.endif
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TARGET_ARCH?= ${MACHINE_ARCH}
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BUILD_ARCH?= ${MACHINE_ARCH}
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# Armv6 and armv7 uses hard float abi, unless the CPUTYPE has soft in it.
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# arm (for armv4 and armv5 CPUs) always uses the soft float ABI.
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# For all other targets, we stick with 'unknown'.
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.if ${TARGET_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "")
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TARGET_ABI= -gnueabihf
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.elif ${TARGET_ARCH:Marm*}
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TARGET_ABI= -gnueabi
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.else
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TARGET_ABI=
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.endif
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VENDOR= unknown
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OS_VERSION= freebsd14.0
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LLVM_TARGET_TRIPLE?= ${TARGET_ARCH:C/amd64/x86_64/:C/[hs]f$//:S/mipsn32/mips64/}-${VENDOR}-${OS_VERSION}${TARGET_ABI}
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LLVM_BUILD_TRIPLE?= ${BUILD_ARCH:C/amd64/x86_64/:C/[hs]f$//:S/mipsn32/mips64/}-${VENDOR}-${OS_VERSION}
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CFLAGS+= -DLLVM_DEFAULT_TARGET_TRIPLE=\"${LLVM_TARGET_TRIPLE}\"
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CFLAGS+= -DLLVM_HOST_TRIPLE=\"${LLVM_BUILD_TRIPLE}\"
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CFLAGS+= -DDEFAULT_SYSROOT=\"${TOOLS_PREFIX}\"
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.if ${MK_LLVM_TARGET_AARCH64} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_AARCH64
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. if ${MACHINE_CPUARCH} == "aarch64"
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LLVM_NATIVE_ARCH= AArch64
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. endif
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.endif
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.if ${MK_LLVM_TARGET_ARM} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_ARM
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. if ${MACHINE_CPUARCH} == "arm"
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LLVM_NATIVE_ARCH= ARM
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. endif
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.endif
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.if ${MK_LLVM_TARGET_BPF} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_BPF
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.endif
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.if ${MK_LLVM_TARGET_MIPS} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_MIPS
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. if ${MACHINE_CPUARCH} == "mips"
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LLVM_NATIVE_ARCH= Mips
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. endif
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.endif
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.if ${MK_LLVM_TARGET_POWERPC} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_POWERPC
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. if ${MACHINE_CPUARCH} == "powerpc"
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LLVM_NATIVE_ARCH= PowerPC
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. endif
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.endif
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.if ${MK_LLVM_TARGET_RISCV} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_RISCV
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. if ${MACHINE_CPUARCH} == "riscv"
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LLVM_NATIVE_ARCH= RISCV
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. endif
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.endif
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.if ${MK_LLVM_TARGET_X86} != "no"
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CFLAGS+= -DLLVM_TARGET_ENABLE_X86
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. if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64"
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LLVM_NATIVE_ARCH= X86
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. endif
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.endif
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.ifdef LLVM_NATIVE_ARCH
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CFLAGS+= -DLLVM_NATIVE_ASMPARSER=LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser
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CFLAGS+= -DLLVM_NATIVE_ASMPRINTER=LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter
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CFLAGS+= -DLLVM_NATIVE_DISASSEMBLER=LLVMInitialize${LLVM_NATIVE_ARCH}Disassembler
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CFLAGS+= -DLLVM_NATIVE_TARGET=LLVMInitialize${LLVM_NATIVE_ARCH}Target
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CFLAGS+= -DLLVM_NATIVE_TARGETINFO=LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo
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CFLAGS+= -DLLVM_NATIVE_TARGETMC=LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC
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.endif
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CFLAGS+= -ffunction-sections
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CFLAGS+= -fdata-sections
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LDFLAGS+= -Wl,--gc-sections
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CXXSTD?= c++14
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CXXFLAGS+= -fno-exceptions
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CXXFLAGS+= -fno-rtti
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CXXFLAGS.clang+= -stdlib=libc++
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.if ${MACHINE_ARCH:Mmips64}
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STATIC_CFLAGS+= -mxgot
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STATIC_CXXFLAGS+= -mxgot
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.endif
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