235 lines
8.1 KiB
Groff
235 lines
8.1 KiB
Groff
.\" -*- nroff -*-
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.\"
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.\" Copyright (c) 1996 A.R.Gordon, andrew.gordon@net-tel.co.uk
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed by the University of
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.\" California, Berkeley and its contributors.
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.\" 4. Neither the name of the University nor the names of its contributors
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.\" may be used to endorse or promote products derived from this software
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.\" without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" Id: man4.i386/lp.4,v 1.9 1999/02/14 12:06:16 nsouch Exp
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.\" $FreeBSD$
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.\"
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.Dd March 4, 1996
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.Os
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.Dt LP 4
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.Sh NAME
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.Nm lp
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.Nd printer port Internet Protocol driver
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.Sh SYNOPSIS
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.Nm ifconfig
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.Ar lp0
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.Ar myaddress hisaddress
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.Op Fl link0
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.Pp
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.Cd "device ppbus"
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.Cd "device plip"
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.Cd "device ppc0 at isa? port? irq 7"
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.Sh DESCRIPTION
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The
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.Nm
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driver allows a PC parallel printer port to be used as a
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point-to-point network interface between two similarly configured systems.
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Data is transferred 4 bits at a time, using the printer status lines for
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input: hence there is no requirement for special bidirectional hardware
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and any standard AT-compatible printer port with working interrupts may be used.
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.Pp
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During the boot process, for each
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.Nm plip
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device which is probed and has an interrupt assigned, a corresponding
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.Nm network
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device is created.
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.Pp
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Configuring an
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.Nm
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device with
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.Xr ifconfig 8
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causes the corresponding
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.Nm parallel port bus
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to be reserved for PLIP until the network interface is configured 'down'.
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.Pp
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The communication protocol is selected by the
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.Cm link0
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flag:
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.Bl -tag -width Fl
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.It Fl link0
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(default) Use
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.Fx
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mode (LPIP). This is the simpler of the two modes
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and therefore slightly more efficient.
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.It Cm link0
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Use Crynwr/Linux compatible mode (CLPIP). This mode has a simulated ethernet
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packet header, and is easier to interface to other types of equipment.
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.El
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.Pp
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The interface MTU defaults to 1500, but may be set to any value. Both ends
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of the link must be configured with the same MTU.
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.Ss Cable Connections
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The cable connecting the two parallel ports should be wired as follows:
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.Bd -literal
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Pin Pin Description
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2 15 Data0 -> ERROR*
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3 13 Data1 -> SLCT
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4 12 Data2 -> PE
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5 10 Data3 -> ACK*
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6 11 Data4 -> BUSY
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15 2 ERROR* -> Data0
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13 3 SLCT -> Data1
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12 4 PE -> Data2
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10 5 ACK* -> Data3
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11 6 BUSY -> Data4
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18-25 18-25 Ground
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.Ed
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.Pp
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Cables with this wiring are widely available as 'Laplink' cables, and
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are often coloured yellow.
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.Pp
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The connections are symmetric, and provide 5 lines in each direction (four
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data plus one handshake). The two modes use the same wiring, but make a
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different choice of which line to use as handshake.
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.Ss FreeBSD LPIP mode
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The signal lines are used as follows:
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.Bl -tag -width dataxxxx(Pinxx)
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.It Em Data0 (Pin 2)
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Data out, bit 0.
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.It Em Data1 (Pin 3)
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Data out, bit 1.
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.It Em Data2 (Pin 4)
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Data out, bit 2.
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.It Em Data3 (Pin 5)
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Handshake out.
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.It Em Data4 (Pin 6)
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Data out, bit 3.
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.It Em ERROR* (pin 15)
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Data in, bit 0.
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.It Em SLCT (pin 13)
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Data in, bit 1.
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.It Em PE (pin 12)
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Data in, bit 2.
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.It Em BUSY (pin 11)
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Data in, bit 3.
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.It Em ACK* (pin 10)
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Handshake in.
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.El
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.Pp
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When idle, all data lines are at zero. Each byte is signalled in four steps:
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sender writes the 4 most significant bits and raises the handshake line;
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receiver reads the 4 bits and raises its handshake to acknowledge;
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sender places the 4 least significant bits on the data lines and lowers
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the handshake; receiver reads the data and lowers its handshake.
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.Pp
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The packet format has a two-byte header, comprising the fixed values 0x08,
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0x00, immediately followed by the IP header and data.
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.Pp
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The start of a packet is indicated by simply signalling the first byte
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of the header. The end of the packet is indicated by inverting
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the data lines (ie. writing the ones-complement of the previous nibble
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to be transmitted) without changing the state of the handshake.
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.Pp
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Note that the end-of-packet marker assumes that the handshake signal and
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the data-out bits can be written in a single instruction - otherwise
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certain byte values in the packet data would falsely be interpreted
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as end-of-packet. This is not a problem for the PC printer port,
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but requires care when implementing this protocol on other equipment.
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.Ss Crynwr/Linux CLPIP mode
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The signal lines are used as follows:
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.Bl -tag -width dataxxxx(Pinxx)
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.It Em Data0 (Pin 2)
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Data out, bit 0.
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.It Em Data1 (Pin 3)
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Data out, bit 1.
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.It Em Data2 (Pin 4)
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Data out, bit 2.
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.It Em Data3 (Pin 5)
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Data out, bit 3.
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.It Em Data4 (Pin 6)
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Handshake out.
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.It Em ERROR* (pin 15)
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Data in, bit 0.
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.It Em SLCT (pin 13)
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Data in, bit 1.
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.It Em PE (pin 12)
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Data in, bit 2.
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.It Em ACK* (pin 10)
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Data in, bit 3.
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.It Em BUSY (pin 11)
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Handshake in.
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.El
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.Pp
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When idle, all data lines are at zero. Each byte is signalled in four steps:
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sender writes the 4 least significant bits and raises the handshake line;
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receiver reads the 4 bits and raises its handshake to acknowledge;
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sender places the 4 most significant bits on the data lines and lowers
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the handshake; receiver reads the data and lowers its handshake.
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[Note that this is the opposite nibble order to LPIP mode].
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.Pp
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Packet format is:
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.Bd -literal
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Length (least significant byte)
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Length (most significant byte)
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12 bytes of supposed MAC addresses (ignored by FreeBSD).
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Fixed byte 0x08
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Fixed byte 0x00
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<IP datagram>
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Checksum byte.
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.Ed
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.Pp
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The length includes the 14 header bytes, but not the length bytes themselves
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nor the checksum byte.
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.Pp
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The checksum is a simple arithmetic sum of all the bytes (again, including
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the header but not checksum or length bytes).
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.Fx
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calculates
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outgoing checksums, but does not validate incoming ones.
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.Pp
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The start of packet has to be signalled specially, since the line chosen
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for handshake-in cannot be used to generate an interrupt. The sender
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writes the value 0x08 to the data lines, and waits for the receiver
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to respond by writing 0x01 to its data lines. The sender then starts
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signalling the first byte of the packet (the length byte).
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.Pp
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End of packet is deduced from the packet length and is not signalled
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specially (although the data lines are restored to the zero, idle
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state to avoid spuriously indicating the start of the next packet).
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.Sh SEE ALSO
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.Xr ppbus 4 ,
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.Xr ppc 4 ,
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.Xr ifconfig 8
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.Sh BUGS
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Busy-waiting loops are used while handshaking bytes, (and worse still when
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waiting for the receiving system to respond to an interrupt for the start
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of a packet). Hence a fast system talking to a slow one will consume
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excessive amounts of CPU. This is unavoidable in the case of CLPIP mode
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due to the choice of handshake lines; it could theoretically be improved
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in the case of LPIP mode.
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.Pp
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Polling timeouts are controlled by counting loop iterations rather than
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timers, and so are dependent on CPU speed. This is somewhat stabilised
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by the need to perform (slow) ISA bus cycles to actually read the port.
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