1537078d8f
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
212 lines
6.0 KiB
C
212 lines
6.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013-2014 Kevin Lo
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#define AXGE_ACCESS_MAC 0x01
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#define AXGE_ACCESS_PHY 0x02
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#define AXGE_ACCESS_WAKEUP 0x03
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#define AXGE_ACCESS_EEPROM 0x04
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#define AXGE_ACCESS_EFUSE 0x05
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#define AXGE_RELOAD_EEPROM_EFUSE 0x06
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#define AXGE_WRITE_EFUSE_EN 0x09
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#define AXGE_WRITE_EFUSE_DIS 0x0A
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#define AXGE_ACCESS_MFAB 0x10
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/* Physical link status register */
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#define AXGE_PLSR 0x02
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#define PLSR_USB_FS 0x01
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#define PLSR_USB_HS 0x02
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#define PLSR_USB_SS 0x04
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/* EEPROM address register */
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#define AXGE_EAR 0x07
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/* EEPROM data low register */
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#define AXGE_EDLR 0x08
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/* EEPROM data high register */
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#define AXGE_EDHR 0x09
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/* EEPROM command register */
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#define AXGE_ECR 0x0a
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/* Rx control register */
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#define AXGE_RCR 0x0b
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#define RCR_STOP 0x0000
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#define RCR_PROMISC 0x0001
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#define RCR_ACPT_ALL_MCAST 0x0002
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#define RCR_AUTOPAD_BNDRY 0x0004
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#define RCR_ACPT_BCAST 0x0008
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#define RCR_ACPT_MCAST 0x0010
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#define RCR_ACPT_PHY_MCAST 0x0020
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#define RCR_START 0x0080
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#define RCR_DROP_CRCERR 0x0100
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#define RCR_IPE 0x0200
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#define RCR_TX_CRC_PAD 0x0400
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/* Node id register */
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#define AXGE_NIDR 0x10
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/* Multicast filter array */
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#define AXGE_MFA 0x16
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/* Medium status register */
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#define AXGE_MSR 0x22
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#define MSR_GM 0x0001
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#define MSR_FD 0x0002
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#define MSR_EN_125MHZ 0x0008
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#define MSR_RFC 0x0010
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#define MSR_TFC 0x0020
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#define MSR_RE 0x0100
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#define MSR_PS 0x0200
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/* Monitor mode status register */
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#define AXGE_MMSR 0x24
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#define MMSR_RWLC 0x02
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#define MMSR_RWMP 0x04
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#define MMSR_RWWF 0x08
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#define MMSR_RW_FLAG 0x10
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#define MMSR_PME_POL 0x20
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#define MMSR_PME_TYPE 0x40
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#define MMSR_PME_IND 0x80
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/* GPIO control/status register */
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#define AXGE_GPIOCR 0x25
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/* Ethernet PHY power & reset control register */
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#define AXGE_EPPRCR 0x26
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#define EPPRCR_BZ 0x0010
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#define EPPRCR_IPRL 0x0020
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#define EPPRCR_AUTODETACH 0x1000
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#define AXGE_RX_BULKIN_QCTRL 0x2e
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#define AXGE_CLK_SELECT 0x33
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#define AXGE_CLK_SELECT_BCS 0x01
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#define AXGE_CLK_SELECT_ACS 0x02
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#define AXGE_CLK_SELECT_ACSREQ 0x10
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#define AXGE_CLK_SELECT_ULR 0x08
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/* COE Rx control register */
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#define AXGE_CRCR 0x34
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#define CRCR_IP 0x01
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#define CRCR_TCP 0x02
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#define CRCR_UDP 0x04
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#define CRCR_ICMP 0x08
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#define CRCR_IGMP 0x10
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#define CRCR_TCPV6 0x20
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#define CRCR_UDPV6 0x40
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#define CRCR_ICMPV6 0x80
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/* COE Tx control register */
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#define AXGE_CTCR 0x35
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#define CTCR_IP 0x01
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#define CTCR_TCP 0x02
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#define CTCR_UDP 0x04
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#define CTCR_ICMP 0x08
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#define CTCR_IGMP 0x10
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#define CTCR_TCPV6 0x20
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#define CTCR_UDPV6 0x40
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#define CTCR_ICMPV6 0x80
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/* Pause water level high register */
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#define AXGE_PWLHR 0x54
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/* Pause water level low register */
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#define AXGE_PWLLR 0x55
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#define AXGE_CONFIG_IDX 0 /* config number 1 */
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#define AXGE_IFACE_IDX 0
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#define GET_MII(sc) uether_getmii(&(sc)->sc_ue)
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/* The interrupt endpoint is currently unused by the ASIX part. */
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enum {
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AXGE_BULK_DT_WR,
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AXGE_BULK_DT_RD,
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AXGE_N_TRANSFER,
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};
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#define AXGE_N_FRAMES 16
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struct axge_frame_txhdr {
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uint32_t len;
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#define AXGE_TXLEN_MASK 0x0001FFFF
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#define AXGE_VLAN_INSERT 0x20000000
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#define AXGE_CSUM_DISABLE 0x80000000
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uint32_t mss;
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#define AXGE_MSS_MASK 0x00003FFF
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#define AXGE_PADDING 0x80008000
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#define AXGE_VLAN_TAG_MASK 0xFFFF0000
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} __packed;
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#define AXGE_TXBYTES(x) ((x) & AXGE_TXLEN_MASK)
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#define AXGE_PHY_ADDR 3
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struct axge_frame_rxhdr {
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uint32_t status;
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#define AXGE_RX_L4_CSUM_ERR 0x00000001
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#define AXGE_RX_L3_CSUM_ERR 0x00000002
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#define AXGE_RX_L4_TYPE_UDP 0x00000004
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#define AXGE_RX_L4_TYPE_ICMP 0x00000008
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#define AXGE_RX_L4_TYPE_IGMP 0x0000000C
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#define AXGE_RX_L4_TYPE_TCP 0x00000010
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#define AXGE_RX_L4_TYPE_MASK 0x0000001C
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#define AXGE_RX_L3_TYPE_IPV4 0x00000020
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#define AXGE_RX_L3_TYPE_IPV6 0x00000040
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#define AXGE_RX_L3_TYPE_MASK 0x00000060
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#define AXGE_RX_VLAN_IND_MASK 0x00000700
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#define AXGE_RX_GOOD_PKT 0x00000800
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#define AXGE_RX_VLAN_PRI_MASK 0x00007000
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#define AXGE_RX_MBCAST 0x00008000
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#define AXGE_RX_LEN_MASK 0x1FFF0000
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#define AXGE_RX_CRC_ERR 0x20000000
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#define AXGE_RX_MII_ERR 0x40000000
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#define AXGE_RX_DROP_PKT 0x80000000
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#define AXGE_RX_LEN_SHIFT 16
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} __packed;
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#define AXGE_RXBYTES(x) (((x) & AXGE_RX_LEN_MASK) >> AXGE_RX_LEN_SHIFT)
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#define AXGE_RX_ERR(x) \
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((x) & (AXGE_RX_CRC_ERR | AXGE_RX_MII_ERR | AXGE_RX_DROP_PKT))
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struct axge_softc {
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struct usb_ether sc_ue;
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struct mtx sc_mtx;
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struct usb_xfer *sc_xfer[AXGE_N_TRANSFER];
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int sc_flags;
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#define AXGE_FLAG_LINK 0x0001 /* got a link */
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};
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#define AXGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define AXGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define AXGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)
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